273 lines
11 KiB
Plaintext
273 lines
11 KiB
Plaintext
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/*
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* arch/arm/boot/dts/panel-l-720p-5-0.dtsi
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*
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* Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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#include <dt-bindings/display/tegra-dc.h>
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#include <dt-bindings/display/tegra-panel.h>
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/ {
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host1x {
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dsi {
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panel_l_720p_5_0: panel-l-720p-5-0 {
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status = "disabled";
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compatible = "l,720p-5-0";
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nvidia,dsi-instance = <DSI_INSTANCE_0>;
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nvidia,dsi-n-data-lanes = <4>;
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nvidia,dsi-pixel-format = <TEGRA_DSI_PIXEL_FORMAT_24BIT_P>;
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nvidia,dsi-refresh-rate = <60>;
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nvidia,dsi-video-data-type = <TEGRA_DSI_VIDEO_TYPE_VIDEO_MODE>;
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nvidia,dsi-video-clock-mode = <TEGRA_DSI_VIDEO_CLOCK_CONTINUOUS>;
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nvidia,dsi-video-burst-mode = <TEGRA_DSI_VIDEO_NONE_BURST_MODE_WITH_SYNC_END>;
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nvidia,dsi-virtual-channel = <TEGRA_DSI_VIRTUAL_CHANNEL_0>;
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nvidia,dsi-panel-reset = <TEGRA_DSI_ENABLE>;
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nvidia,dsi-power-saving-suspend = <TEGRA_DSI_ENABLE>;
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nvidia,dsi-ulpm-not-support = <TEGRA_DSI_ENABLE>;
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nvidia,dsi-init-cmd = <TEGRA_DSI_PACKET_CMD DSI_GENERIC_LONG_WRITE 0x6 0x0 0x0 0xe0 0x43 0x0 0x80 0x0 0x0 0x0 0x0>,
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<TEGRA_DSI_PACKET_CMD DSI_GENERIC_LONG_WRITE 0x6 0x0 0x0 0xb5 0x34 0x20 0x40 0x0 0x20 0x0 0x0>,
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<TEGRA_DSI_PACKET_CMD DSI_GENERIC_LONG_WRITE 0x6 0x0 0x0 0xb6 0x04 0x74 0x0f 0x16 0x13 0x0 0x0>,
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<TEGRA_DSI_PACKET_CMD DSI_GENERIC_LONG_WRITE 0x3 0x0 0x0 0xc0 0x01 0x08 0x0 0x0>,
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<0x0 DSI_GENERIC_SHORT_WRITE_2_PARAMS 0xc1 0x0 0x0>,
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<TEGRA_DSI_PACKET_CMD DSI_GENERIC_LONG_WRITE 0xa 0x0 0x0 0xc3 0x0 0x09 0x10 0x02 0x0 0x66 0x00 0x13 0x0 0x0 0x0>,
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<TEGRA_DSI_PACKET_CMD DSI_GENERIC_LONG_WRITE 0x6 0x0 0x0 0xc4 0x23 0x24 0x12 0x12 0x60 0x0 0x0>,
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<TEGRA_DSI_PACKET_CMD DSI_GENERIC_LONG_WRITE 0xa 0x0 0x0 0xd0 0x21 0x25 0x67 0x36 0x0a 0x06 0x61 0x23 0x03 0x0 0x0>,
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<TEGRA_DSI_PACKET_CMD DSI_GENERIC_LONG_WRITE 0xa 0x0 0x0 0xd1 0x31 0x25 0x66 0x36 0x05 0x06 0x61 0x23 0x03 0x0 0x0>,
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<TEGRA_DSI_PACKET_CMD DSI_GENERIC_LONG_WRITE 0xa 0x0 0x0 0xd2 0x41 0x26 0x56 0x36 0x0a 0x06 0x61 0x23 0x03 0x0 0x0>,
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<TEGRA_DSI_PACKET_CMD DSI_GENERIC_LONG_WRITE 0xa 0x0 0x0 0xd3 0x51 0x26 0x55 0x36 0x05 0x06 0x61 0x23 0x03 0x0 0x0>,
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<TEGRA_DSI_PACKET_CMD DSI_GENERIC_LONG_WRITE 0xa 0x0 0x0 0xd4 0x41 0x26 0x56 0x36 0x0a 0x06 0x61 0x23 0x03 0x0 0x0>,
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<TEGRA_DSI_PACKET_CMD DSI_GENERIC_LONG_WRITE 0xa 0x0 0x0 0xd5 0x51 0x26 0x55 0x36 0x05 0x06 0x61 0x23 0x03 0x0 0x0>,
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<0x0 DSI_DCS_WRITE_1_PARAM DSI_DCS_SET_ADDR_MODE 0x0b 0x0>,
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<0x0 DSI_GENERIC_SHORT_WRITE_2_PARAMS 0xf9 0x0 0x0>,
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<0x0 DSI_GENERIC_SHORT_WRITE_2_PARAMS 0xc2 0x02 0x0>,
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<TEGRA_DSI_DELAY_MS 20>,
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<0x0 DSI_GENERIC_SHORT_WRITE_2_PARAMS 0xc2 0x06 0x0>,
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<TEGRA_DSI_DELAY_MS 20>,
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<0x0 DSI_GENERIC_SHORT_WRITE_2_PARAMS 0xc2 0x4e 0x0>,
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<TEGRA_DSI_DELAY_MS 100>,
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<0x0 DSI_DCS_WRITE_0_PARAM DSI_DCS_EXIT_SLEEP_MODE 0x0 0x0>,
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<TEGRA_DSI_DELAY_MS 140>,
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<0x0 DSI_GENERIC_SHORT_WRITE_2_PARAMS 0xf9 0x80 0x0>,
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<TEGRA_DSI_DELAY_MS 20>,
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<0x0 DSI_DCS_WRITE_0_PARAM DSI_DCS_SET_DISPLAY_ON 0x0 0x0>;
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nvidia,dsi-n-init-cmd = <26>;
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nvidia,dsi-suspend-cmd = <TEGRA_DSI_DELAY_MS 40>,
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<0x0 DSI_DCS_WRITE_0_PARAM DSI_DCS_SET_DISPLAY_OFF 0x0 0x0>,
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<TEGRA_DSI_DELAY_MS 20>,
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<0x0 DSI_DCS_WRITE_0_PARAM DSI_DCS_ENTER_SLEEP_MODE 0x0 0x0>,
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<0x0 DSI_GENERIC_SHORT_WRITE_2_PARAMS 0xc2 0x0 0x0>,
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<TEGRA_DSI_PACKET_CMD DSI_GENERIC_LONG_WRITE 0x6 0x0 0x0 0xc4 0x0 0x0 0x0 0x0 0x0 0x0 0x0>,
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<0x0 DSI_GENERIC_SHORT_WRITE_2_PARAMS 0xc1 0x2 0x0>,
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<TEGRA_DSI_DELAY_MS 20>,
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<0x0 DSI_GENERIC_SHORT_WRITE_2_PARAMS 0xc1 0x3 0x0>,
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<TEGRA_DSI_DELAY_MS 20>;
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nvidia,dsi-n-suspend-cmd = <10>;
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disp-default-out {
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nvidia,out-type = <TEGRA_DC_OUT_DSI>;
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nvidia,out-width = <62>;
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nvidia,out-height = <110>;
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nvidia,out-flags = <TEGRA_DC_OUT_CONTINUOUS_MODE TEGRA_DC_OUT_INITIALIZED_MODE>;
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nvidia,out-xres = <720>;
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nvidia,out-yres = <1280>;
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};
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display-timings {
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720x1280-32 {
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clock-frequency = <66700000>;
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hactive = <720>;
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vactive = <1280>;
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hfront-porch = <12>;
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hback-porch = <112>;
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hsync-len = <4>;
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vfront-porch = <8>;
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vback-porch = <12>;
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vsync-len = <4>;
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nvidia,h-ref-to-sync = <4>;
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nvidia,v-ref-to-sync = <1>;
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};
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};
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smartdimmer {
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status = "disabled";
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nvidia,use-auto-pwm = <0>;
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nvidia,hw-update-delay = <0>;
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nvidia,bin-width = <0xffffffff>;
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nvidia,aggressiveness = <1>;
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nvidia,use-vid-luma = <0>;
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nvidia,phase-in-settings = <0>;
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nvidia,phase-in-adjustments = <0>;
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nvidia,k-limit-enable = <1>;
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nvidia,k-limit = <180>;
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nvidia,sd-window-enable = <0>;
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nvidia,soft-clipping-enable= <1>;
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nvidia,soft-clipping-threshold = <128>;
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nvidia,smooth-k-enable = <1>;
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nvidia,smooth-k-incr = <16>;
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nvidia,coeff = <5 9 2>;
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nvidia,fc = <0 0>;
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nvidia,blp = <1024 255>;
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nvidia,bltf = <57 65 73 82
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92 103 114 125
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138 150 164 178
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193 208 224 241>;
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nvidia,lut = <255 255 255
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199 199 199
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153 153 153
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116 116 116
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36 36 36
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17 17 17
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0 0 0>;
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nvidia,bl-device-name = "pwm-backlight";
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};
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cmu {
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nvidia,cmu-csc = < 0x100 0x0 0x0
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0x0 0x100 0x0
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0x0 0x0 0x100 >;
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nvidia,cmu-lut2 = < 0 0 1 2 3 3 4 5
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211 212 212 213 213 213 214 214
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231 232 232 232 233 233 233 233
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244 245 245 246 247 247 248 249
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250 250 251 252 253 254 254 255 >;
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};
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};
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};
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};
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backlight {
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panel_l_720p_5_0_bl: panel-l-720p-5-0-bl {
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status = "disabled";
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compatible = "l,720p-5-0-bl";
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pwms = <&tegra_pwm 1 40000>;
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max-brightness = <255>;
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default-brightness = <77>;
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};
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};
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};
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