1006 lines
35 KiB
Plaintext
1006 lines
35 KiB
Plaintext
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/*
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* Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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*/
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/ {
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host1x {
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sor {
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prod-settings {
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#prod-cells = <3>;
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prod_c_dp {
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prod = <
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0x0000005c 0x0f000f10 0x01000310 // SOR_NV_PDISP_SOR_PLL0_0 27:24=ICHPMP 0x01
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// 11:08=VCOCAP 0x03
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// 04:04=RESISTORSEL 0x01
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0x00000060 0x03f00100 0x00400100 // SOR_NV_PDISP_SOR_PLL1_0 25:24=LVDSCM 0x00
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// 23:20=LOADADJ 0x04
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// 08:08=TMDS_TERM 0x01
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0x00000068 0x00002000 0x00002000 // SOR_NV_PDISP_SOR_PLL3_0 13:13=PLVVDD_MODE 0x01
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0x00000070 0xffffffff 0x00000000 // SOR_NV_PDISP_SOR_LVDS_0
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0x00000180 0x00000001 0x00000001 // SOR_NV_PDISP_SOR_DP_SPARE0_0 00:00=SEQ_ENABLE 0x01
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>;
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};
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};
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};
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sor1 {
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prod-settings {
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#prod-cells = <3>;
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prod_list_hdmi_soc = "prod_c_hdmi_0m_54m", "prod_c_hdmi_54m_111m",
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"prod_c_hdmi_111m_223m", "prod_c_hdmi_223m_300m",
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"prod_c_hdmi_300m_600m";
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prod {
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prod = <
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0x000003a0 0x00000001 0x00000001 // SOR_NV_PDISP_INPUT_CONTROL 00:00=HDMI_SRC_SELECT 0x1
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0x0000005c 0x0f000700 0x01000000 // SOR_NV_PDISP_SOR_PLL0_0 11:08=VCOCAP 0x0
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// 27:24=ICHPMP 0x1
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0x00000060 0x00f01f00 0x00401380 // SOR_NV_PDISP_SOR_PLL1_0 08:08=TMDS_TERM 0x1
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// 12:09=TMDS_TERMADJ 0x9
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// 23:20=LOADADJ 0x4
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0x00000068 0x0f000000 0x08000000 // SOR_NV_PSIDP_SOR_PLL3_0 27:24=BG_VREF_LEVEL 0x8
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0x00000138 0xffffffff 0x333A3A3A // SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
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// 31:24=LANE3_DP_LANE3 0x33
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// 23:16=LANE2_DP_LANE0 0x3A
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// 15:08=LANE1_DP_LANE1 0x3A
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// 07:00=LANE0_DP_LANE2 0x3A
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0x00000148 0xffffffff 0x00000000 // SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0_0
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// 31:24=LANE3_DP_LANE3 0x00
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// 23:16=LANE2_DP_LANE0 0x00
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// 15:08=LANE1_DP_LANE1 0x00
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// 07:00=LANE0_DP_LANE2 0x00
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0x00000170 0x0040ff00 0x00401000 // SOR_NV_PDISP_SOR_DP_PADCTL0_0
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// 22:22=TX_PU 0x1
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// 15:08=TX_PU_VALUE 0x10
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>;
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};
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prod_c_hdmi_0m_54m {
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prod = <
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0x000003a0 0x000000002 0x00000002 // SOR_NV_PDISP_INPUT_CONTROL 01:01=ARM_VIDEO_RANGE 0x1
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0x0000005c 0x0f000700 0x01000000 // SOR_NV_PDISP_SOR_PLL0_0 11:08=VCOCAP 0x0
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// 27:24=ICHPMP 0x1
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0x00000060 0x00f01f00 0x00401380 // SOR_NV_PDISP_SOR_PLL1_0 08:08=TMDS_TERM 0x1
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// 12:09=TMDS_TERMADJ 0x9
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// 23:20=LOADADJ 0x4
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0x00000068 0x0f000000 0x08000000 // SOR_NV_PSIDP_SOR_PLL3_0 27:24=BG_VREF_LEVEL 0x8
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0x00000138 0xffffffff 0x333A3A3A // SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
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// 31:24=LANE3_DP_LANE3 0x33
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// 23:16=LANE2_DP_LANE0 0x3A
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// 15:08=LANE1_DP_LANE1 0x3A
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// 07:00=LANE0_DP_LANE2 0x3A
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0x00000148 0xffffffff 0x00000000 // SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0_0
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// 31:24=LANE3_DP_LANE3 0x00
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// 23:16=LANE2_DP_LANE0 0x00
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// 15:08=LANE1_DP_LANE1 0x00
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// 07:00=LANE0_DP_LANE2 0x00
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0x00000170 0x0040ff00 0x00401000 // SOR_NV_PDISP_SOR_DP_PADCTL0_0
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// 22:22=TX_PU 0x1
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// 15:08=TX_PU_VALUE 0x10
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>;
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};
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prod_c_hdmi_54m_111m {
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prod = <
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0x000003a0 0x00000002 0x00000002 // SOR_NV_PDISP_INPUT_CONTROL 01:01=ARM_VIDEO_RANGE 0x1
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0x0000005c 0x0f000700 0x01000100 // SOR_NV_PDISP_SOR_PLL0_0 11:08=VCOCAP 0x1
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// 27:24=ICHPMP 0x1
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0x00000060 0x00f01f00 0x00401380 // SOR_NV_PDISP_SOR_PLL1_0 08:08=TMDS_TERM 0x1
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// 12:09=TMDS_TERMADJ 0x9
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// 23:20=LOADADJ 0x4
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0x00000068 0x0f000000 0x08000000 // SOR_NV_PSIDP_SOR_PLL3_0 27:24=BG_VREF_LEVEL 0x8
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0x00000138 0xffffffff 0x333A3A3A // SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
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// 31:24=LANE3_DP_LANE3 0x33
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// 23:16=LANE2_DP_LANE0 0x3A
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// 15:08=LANE1_DP_LANE1 0x3A
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// 07:00=LANE0_DP_LANE2 0x3A
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0x00000148 0xffffffff 0x00000000 // SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0_0
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// 31:24=LANE3_DP_LANE3 0x00
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// 23:16=LANE2_DP_LANE0 0x00
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// 15:08=LANE1_DP_LANE1 0x00
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// 07:00=LANE0_DP_LANE2 0x00
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0x00000170 0x0040ff00 0x00404000 // SOR_NV_PDISP_SOR_DP_PADCTL0_0
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// 22:22=TX_PU 0x1
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// 15:08=TX_PU_VALUE 0x40
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>;
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};
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prod_c_hdmi_111m_223m {
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prod = <
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0x000003a0 0x00000002 0x00000000 // SOR_NV_PDISP_INPUT_CONTROL 01:01=ARM_VIDEO_RANGE 0x0
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0x0000005c 0x0f000700 0x01000300 // SOR_NV_PDISP_SOR_PLL0_0 11:08=VCOCAP 0x3
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// 27:24=ICHPMP 0x1
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0x00000060 0xff0fe0ff 0x00401380 // SOR_NV_PDISP_SOR_PLL1_0 08:08=TMDS_TERM 0x1
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// 12:09=TMDS_TERMADJ 0x9
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// 23:20=LOADADJ 0x4
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0x00000068 0x0f000000 0x08000000 // SOR_NV_PSIDP_SOR_PLL3_0 27:24=BG_VREF_LEVEL 0x8
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0x00000138 0xffffffff 0x333A3A3A // SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
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// 31:24=LANE3_DP_LANE3 0x33
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// 23:16=LANE2_DP_LANE0 0x3A
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// 15:08=LANE1_DP_LANE1 0x3A
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// 07:00=LANE0_DP_LANE2 0x3A
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0x00000148 0xffffffff 0x00000000 // SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0_0
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// 31:24=LANE3_DP_LANE3 0x00
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// 23:16=LANE2_DP_LANE0 0x00
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// 15:08=LANE1_DP_LANE1 0x00
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// 07:00=LANE0_DP_LANE2 0x00
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0x00000170 0x0040ff00 0x00406600 // SOR_NV_PDISP_SOR_DP_PADCTL0_0
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// 22:22=TX_PU 0x1
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// 15:08=TX_PU_VALUE 0x66
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>;
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};
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prod_c_hdmi_223m_300m {
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prod = <
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0x000003a0 0x00000002 0x00000000 // SOR_NV_PDISP_INPUT_CONTROL 01:01=ARM_VIDEO_RANGE 0x0
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0x0000005c 0x0f000700 0x01000300 // SOR_NV_PDISP_SOR_PLL0_0 11:08=VCOCAP 0x3
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// 27:24=ICHPMP 0x1
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0x00000060 0x00f01f00 0x00401380 // SOR_NV_PDISP_SOR_PLL1_0 08:08=TMDS_TERM 0x1
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// 12:09=TMDS_TERMADJ 0x9
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// 23:20=LOADADJ 0x4
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0x00000068 0x0f000000 0x0A000000 // SOR_NV_PSIDP_SOR_PLL3_0 27:24=BG_VREF_LEVEL 0xA
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0x00000138 0xffffffff 0x333F3F3F // SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
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// 31:24=LANE3_DP_LANE3 0x33
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// 23:16=LANE2_DP_LANE0 0x3F
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// 15:08=LANE1_DP_LANE1 0x3F
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// 07:00=LANE0_DP_LANE2 0x3F
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0x00000148 0xffffffff 0x00171717 // SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0_0
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// 31:24=LANE3_DP_LANE3 0x00
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// 23:16=LANE2_DP_LANE0 0x17
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// 15:08=LANE1_DP_LANE1 0x17
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// 07:00=LANE0_DP_LANE2 0x17
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0x00000170 0x0040ff00 0x00406600 // SOR_NV_PDISP_SOR_DP_PADCTL0_0
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// 22:22=TX_PU 0x1
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// 15:08=TX_PU_VALUE 0x66
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>;
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};
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prod_c_hdmi_300m_600m {
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prod = <
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0x000003a0 0x00000002 0x00000002 // SOR_NV_PDISP_INPUT_CONTROL 01:01=ARM_VIDEO_RANGE 0x1
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0x0000005c 0x0f000700 0x01000300 // SOR_NV_PDISP_SOR_PLL0_0 11:08=VCOCAP 0x3
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// 27:24=ICHPMP 0x1
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0x00000060 0x00f01f00 0x00401380 // SOR_NV_PDISP_SOR_PLL1_0 08:08=TMDS_TERM 0x1
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// 12:09=TMDS_TERMADJ 0x9
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// 23:20=LOADADJ 0x4
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0x00000068 0x0f000000 0x08000000 // SOR_NV_PSIDP_SOR_PLL3_0 27:24=BG_VREF_LEVEL 0x8
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0x00000138 0xffffffff 0x333F3F3F // SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
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// 31:24=LANE3_DP_LANE3 0x33
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// 23:16=LANE2_DP_LANE0 0x3f
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// 15:08=LANE1_DP_LANE1 0x3f
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// 07:00=LANE0_DP_LANE2 0x3f
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0x00000148 0xffffffff 0x00000000 // SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0_0
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// 31:24=LANE3_DP_LANE3 0x00
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// 23:16=LANE2_DP_LANE0 0x00
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// 15:08=LANE1_DP_LANE1 0x00
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// 07:00=LANE0_DP_LANE2 0x00
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0x00000170 0x0040ff00 0x00406600 // SOR_NV_PDISP_SOR_DP_PADCTL0_0
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// 22:22=TX_PU 0x1
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// 15:08=TX_PU_VALUE 0x66
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>;
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};
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/* HDMI prod-settings for fall-back to old DT config
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* when prod_list_hdmi_soc/board are not found */
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prod_c_54M {
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prod = <
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0x000003a0 0x000000002 0x00000002 // SOR_NV_PDISP_INPUT_CONTROL 01:01=ARM_VIDEO_RANGE 0x1
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0x0000005c 0x0f000700 0x01000000 // SOR_NV_PDISP_SOR_PLL0_0 11:08=VCOCAP 0x0
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// 27:24=ICHPMP 0x1
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0x00000060 0x00f01f00 0x00401380 // SOR_NV_PDISP_SOR_PLL1_0 08:08=TMDS_TERM 0x1
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// 12:09=TMDS_TERMADJ 0x9
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// 23:20=LOADADJ 0x4
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0x00000068 0x0f000000 0x08000000 // SOR_NV_PSIDP_SOR_PLL3_0 27:24=BG_VREF_LEVEL 0x8
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0x00000138 0xffffffff 0x333A3A3A // SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
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// 31:24=LANE3_DP_LANE3 0x33
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// 23:16=LANE2_DP_LANE0 0x3A
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// 15:08=LANE1_DP_LANE1 0x3A
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// 07:00=LANE0_DP_LANE2 0x3A
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0x00000148 0xffffffff 0x00000000 // SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0_0
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// 31:24=LANE3_DP_LANE3 0x00
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// 23:16=LANE2_DP_LANE0 0x00
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// 15:08=LANE1_DP_LANE1 0x00
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// 07:00=LANE0_DP_LANE2 0x00
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0x00000170 0x0040ff00 0x00401000 // SOR_NV_PDISP_SOR_DP_PADCTL0_0
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// 22:22=TX_PU 0x1
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// 15:08=TX_PU_VALUE 0x10
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>;
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};
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prod_c_75M {
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prod = <
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0x000003a0 0x00000002 0x00000002 // SOR_NV_PDISP_INPUT_CONTROL 01:01=ARM_VIDEO_RANGE 0x1
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0x0000005c 0x0f000700 0x01000100 // SOR_NV_PDISP_SOR_PLL0_0 11:08=VCOCAP 0x1
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// 27:24=ICHPMP 0x1
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0x00000060 0x00f01f00 0x00401380 // SOR_NV_PDISP_SOR_PLL1_0 08:08=TMDS_TERM 0x1
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// 12:09=TMDS_TERMADJ 0x9
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// 23:20=LOADADJ 0x4
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0x00000068 0x0f000000 0x08000000 // SOR_NV_PSIDP_SOR_PLL3_0 27:24=BG_VREF_LEVEL 0x8
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0x00000138 0xffffffff 0x333A3A3A // SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
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// 31:24=LANE3_DP_LANE3 0x33
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// 23:16=LANE2_DP_LANE0 0x3A
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// 15:08=LANE1_DP_LANE1 0x3A
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// 07:00=LANE0_DP_LANE2 0x3A
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0x00000148 0xffffffff 0x00000000 // SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0_0
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// 31:24=LANE3_DP_LANE3 0x00
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// 23:16=LANE2_DP_LANE0 0x00
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// 15:08=LANE1_DP_LANE1 0x00
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// 07:00=LANE0_DP_LANE2 0x00
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0x00000170 0x0040ff00 0x00404000 // SOR_NV_PDISP_SOR_DP_PADCTL0_0
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// 22:22=TX_PU 0x1
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// 15:08=TX_PU_VALUE 0x40
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>;
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};
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prod_c_150M {
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prod = <
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0x000003a0 0x00000002 0x00000000 // SOR_NV_PDISP_INPUT_CONTROL 01:01=ARM_VIDEO_RANGE 0x0
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0x0000005c 0x0f000700 0x01000300 // SOR_NV_PDISP_SOR_PLL0_0 11:08=VCOCAP 0x3
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// 27:24=ICHPMP 0x1
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0x00000060 0xff0fe0ff 0x00401380 // SOR_NV_PDISP_SOR_PLL1_0 08:08=TMDS_TERM 0x1
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// 12:09=TMDS_TERMADJ 0x9
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// 23:20=LOADADJ 0x4
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0x00000068 0x0f000000 0x08000000 // SOR_NV_PSIDP_SOR_PLL3_0 27:24=BG_VREF_LEVEL 0x8
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|
|
0x00000138 0xffffffff 0x333A3A3A // SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
|
||
|
|
// 31:24=LANE3_DP_LANE3 0x33
|
||
|
|
// 23:16=LANE2_DP_LANE0 0x3A
|
||
|
|
// 15:08=LANE1_DP_LANE1 0x3A
|
||
|
|
// 07:00=LANE0_DP_LANE2 0x3A
|
||
|
|
0x00000148 0xffffffff 0x00000000 // SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0_0
|
||
|
|
// 31:24=LANE3_DP_LANE3 0x00
|
||
|
|
// 23:16=LANE2_DP_LANE0 0x00
|
||
|
|
// 15:08=LANE1_DP_LANE1 0x00
|
||
|
|
// 07:00=LANE0_DP_LANE2 0x00
|
||
|
|
0x00000170 0x0040ff00 0x00406600 // SOR_NV_PDISP_SOR_DP_PADCTL0_0
|
||
|
|
// 22:22=TX_PU 0x1
|
||
|
|
// 15:08=TX_PU_VALUE 0x66
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
prod_c_300M {
|
||
|
|
prod = <
|
||
|
|
0x000003a0 0x00000002 0x00000000 // SOR_NV_PDISP_INPUT_CONTROL 01:01=ARM_VIDEO_RANGE 0x0
|
||
|
|
0x0000005c 0x0f000700 0x01000300 // SOR_NV_PDISP_SOR_PLL0_0 11:08=VCOCAP 0x3
|
||
|
|
// 27:24=ICHPMP 0x1
|
||
|
|
0x00000060 0x00f01f00 0x00401380 // SOR_NV_PDISP_SOR_PLL1_0 08:08=TMDS_TERM 0x1
|
||
|
|
// 12:09=TMDS_TERMADJ 0x9
|
||
|
|
// 23:20=LOADADJ 0x4
|
||
|
|
0x00000068 0x0f000000 0x0A000000 // SOR_NV_PSIDP_SOR_PLL3_0 27:24=BG_VREF_LEVEL 0xA
|
||
|
|
0x00000138 0xffffffff 0x333F3F3F // SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
|
||
|
|
// 31:24=LANE3_DP_LANE3 0x33
|
||
|
|
// 23:16=LANE2_DP_LANE0 0x3F
|
||
|
|
// 15:08=LANE1_DP_LANE1 0x3F
|
||
|
|
// 07:00=LANE0_DP_LANE2 0x3F
|
||
|
|
0x00000148 0xffffffff 0x00171717 // SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0_0
|
||
|
|
// 31:24=LANE3_DP_LANE3 0x00
|
||
|
|
// 23:16=LANE2_DP_LANE0 0x17
|
||
|
|
// 15:08=LANE1_DP_LANE1 0x17
|
||
|
|
// 07:00=LANE0_DP_LANE2 0x17
|
||
|
|
0x00000170 0x0040ff00 0x00406600 // SOR_NV_PDISP_SOR_DP_PADCTL0_0
|
||
|
|
// 22:22=TX_PU 0x1
|
||
|
|
// 15:08=TX_PU_VALUE 0x66
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
prod_c_600M {
|
||
|
|
prod = <
|
||
|
|
0x000003a0 0x00000002 0x00000002 // SOR_NV_PDISP_INPUT_CONTROL 01:01=ARM_VIDEO_RANGE 0x1
|
||
|
|
0x0000005c 0x0f000700 0x01000300 // SOR_NV_PDISP_SOR_PLL0_0 11:08=VCOCAP 0x3
|
||
|
|
// 27:24=ICHPMP 0x1
|
||
|
|
0x00000060 0x00f01f00 0x00401380 // SOR_NV_PDISP_SOR_PLL1_0 08:08=TMDS_TERM 0x1
|
||
|
|
// 12:09=TMDS_TERMADJ 0x9
|
||
|
|
// 23:20=LOADADJ 0x4
|
||
|
|
0x00000068 0x0f000000 0x08000000 // SOR_NV_PSIDP_SOR_PLL3_0 27:24=BG_VREF_LEVEL 0x8
|
||
|
|
0x00000138 0xffffffff 0x333F3F3F // SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
|
||
|
|
// 31:24=LANE3_DP_LANE3 0x33
|
||
|
|
// 23:16=LANE2_DP_LANE0 0x3f
|
||
|
|
// 15:08=LANE1_DP_LANE1 0x3f
|
||
|
|
// 07:00=LANE0_DP_LANE2 0x3f
|
||
|
|
0x00000148 0xffffffff 0x00000000 // SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0_0
|
||
|
|
// 31:24=LANE3_DP_LANE3 0x00
|
||
|
|
// 23:16=LANE2_DP_LANE0 0x00
|
||
|
|
// 15:08=LANE1_DP_LANE1 0x00
|
||
|
|
// 07:00=LANE0_DP_LANE2 0x00
|
||
|
|
0x00000170 0x0040ff00 0x00406600 // SOR_NV_PDISP_SOR_DP_PADCTL0_0
|
||
|
|
// 22:22=TX_PU 0x1
|
||
|
|
// 15:08=TX_PU_VALUE 0x66
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
prod_c_dp {
|
||
|
|
prod = <
|
||
|
|
0x0000005c 0x0f000f10 0x01000310 // SOR_NV_PDISP_SOR_PLL0_0 27:24=ICHPMP 0x01
|
||
|
|
// 11:08=VCOCAP 0x03
|
||
|
|
// 04:04=RESISTORSEL 0x01
|
||
|
|
0x00000060 0x03f00100 0x00400100 // SOR_NV_PDISP_SOR_PLL1_0 25:24=LVDSCM 0x00
|
||
|
|
// 23:20=LOADADJ 0x04
|
||
|
|
// 08:08=TMDS_TERM 0x01
|
||
|
|
0x00000068 0x00002000 0x00002000 // SOR_NV_PDISP_SOR_PLL3_0 13:13=PLVVDD_MODE 0x01
|
||
|
|
0x00000070 0xffffffff 0x00000000 // SOR_NV_PDISP_SOR_LVDS_0
|
||
|
|
0x00000180 0x00000001 0x00000001 // SOR_NV_PDISP_SOR_DP_SPARE0_0 00:00=SEQ_ENABLE 0x01
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
dpaux {
|
||
|
|
prod-settings {
|
||
|
|
#prod-cells = <3>;
|
||
|
|
|
||
|
|
prod_c_dpaux_dp {
|
||
|
|
prod = <
|
||
|
|
0x00000124 0x000037fe 0x000024c2
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
prod_c_dpaux_hdmi {
|
||
|
|
prod = <
|
||
|
|
0x00000124 0x00000700 0x00000400
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
dpaux1 {
|
||
|
|
prod-settings {
|
||
|
|
#prod-cells = <3>;
|
||
|
|
prod_c_dpaux_dp {
|
||
|
|
prod = <
|
||
|
|
0x00000124 0x000037fe 0x000024c2
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
prod_c_dpaux_hdmi {
|
||
|
|
prod = <
|
||
|
|
0x00000124 0x00000700 0x00000400
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
pinmux@700008d4 {
|
||
|
|
prod-settings {
|
||
|
|
#prod-cells = <4>;
|
||
|
|
prod {
|
||
|
|
status = "okay";
|
||
|
|
nvidia,prod-boot-init;
|
||
|
|
prod = <0 0x1C4 0xF7F7F000 0x51212000
|
||
|
|
0 0x128 0x01F1F000 0x01010000 //GPIO_PZ0 DRVUP-DN
|
||
|
|
0 0x12C 0x01F1F000 0x01010000 //GPIO_PZ1 DRVUP-DN
|
||
|
|
0 0x1C8 0xF0003FFD 0x00001040
|
||
|
|
0 0x1DC 0xF7F7F000 0x51212000
|
||
|
|
0 0x1E0 0xF0003FFD 0x00001040
|
||
|
|
0 0x23C 0x01F1F000 0x01F1F000 //TOUCH_CLK DRVUP-DN
|
||
|
|
0 0x20 0x01F1F000 0x01010000 //AUD_MCLK
|
||
|
|
0 0x44 0x01F1F000 0x01010000 //CAM1_MCLK DRVUP-DN
|
||
|
|
0 0x50 0x01F1F000 0x01010000 //CAM2_MCLK DRVUP-DN
|
||
|
|
0 0x58 0x01F1F000 0x01010000 //CAM_AF_EN DRVUP-DN
|
||
|
|
0 0x5C 0x01F1F000 0x01010000 //CAM_FLASH_EN DRVUP-DN
|
||
|
|
0 0xA0 0x01F1F000 0x01010000 //I2S4B DIN
|
||
|
|
0 0xA4 0x01F1F000 0x01010000 //I2S4B DOUT
|
||
|
|
0 0xA8 0x01F1F000 0x01010000 //I2S4B FS
|
||
|
|
0 0xAC 0x01F1F000 0x01010000 //I2S4B SCLK
|
||
|
|
0 0xB0 0x01F1F000 0x01F1F000 //DMIC1 CLK
|
||
|
|
0 0xB4 0x01F1F000 0x01F1F000 //DMIC1 DATA
|
||
|
|
0 0xB8 0x01F1F000 0x01F1F000 //DMIC2 CLK
|
||
|
|
0 0xBC 0x01F1F000 0x01F1F000 //DMIC2 DATA
|
||
|
|
0 0xC0 0x01F1F000 0x01F1F000 //DMIC3 CLK
|
||
|
|
0 0xC4 0x01F1F000 0x01F1F000 //DMIC3 DATA
|
||
|
|
1 0x00 0x00007200 0x00002000
|
||
|
|
1 0x04 0x00007200 0x00002000
|
||
|
|
1 0x08 0x00007200 0x00002000
|
||
|
|
1 0x0C 0x00007200 0x00002000
|
||
|
|
1 0x10 0x00007200 0x00002000
|
||
|
|
1 0x14 0x00007200 0x00002000
|
||
|
|
1 0x1C 0x00007200 0x00002000
|
||
|
|
1 0x20 0x00007200 0x00002000
|
||
|
|
1 0x24 0x00007200 0x00002000
|
||
|
|
1 0x28 0x00007200 0x00002000
|
||
|
|
1 0x2C 0x00007200 0x00002000
|
||
|
|
1 0x30 0x00007200 0x00002000
|
||
|
|
1 0x160 0x00001000 0x00001000>;
|
||
|
|
};
|
||
|
|
|
||
|
|
i2s2_prod {
|
||
|
|
prod = <0 0xB0 0x01F1F000 0x01010000 // FS
|
||
|
|
0 0xB4 0x01F1F000 0x01010000 // DIN
|
||
|
|
0 0xB8 0x01F1F000 0x01010000 // DOUT
|
||
|
|
0 0xBC 0x01F1F000 0x01010000>; // SCLK
|
||
|
|
};
|
||
|
|
|
||
|
|
spi1_prod {
|
||
|
|
nvidia,prod-boot-init;
|
||
|
|
prod = <0 0x200 0xF0000000 0x50000000
|
||
|
|
0 0x204 0xF0000000 0x50000000
|
||
|
|
0 0x208 0xF0000000 0x50000000
|
||
|
|
0 0x20c 0xF0000000 0x50000000
|
||
|
|
0 0x210 0xF0000000 0x50000000
|
||
|
|
1 0x50 0x00006000 0x00006040
|
||
|
|
1 0x54 0x00006000 0x00006040
|
||
|
|
1 0x58 0x00006000 0x00006040
|
||
|
|
1 0x5c 0x00006000 0x00006040
|
||
|
|
1 0x60 0x00006000 0x00006040>;
|
||
|
|
};
|
||
|
|
spi2_prod {
|
||
|
|
nvidia,prod-boot-init;
|
||
|
|
prod = <0 0x214 0xF0000000 0xd0000000
|
||
|
|
0 0x218 0xF0000000 0xd0000000
|
||
|
|
0 0x21c 0xF0000000 0xd0000000
|
||
|
|
0 0x220 0xF0000000 0xd0000000
|
||
|
|
0 0x224 0xF0000000 0xd0000000
|
||
|
|
1 0x64 0x00006000 0x00006040
|
||
|
|
1 0x68 0x00006000 0x00006040
|
||
|
|
1 0x6c 0x00006000 0x00006040
|
||
|
|
1 0x70 0x00006000 0x00006040
|
||
|
|
1 0x74 0x00006000 0x00006040>;
|
||
|
|
};
|
||
|
|
spi3_prod {
|
||
|
|
nvidia,prod-boot-init;
|
||
|
|
prod = <0 0xcc 0x01404000 0x01414000
|
||
|
|
0 0xd0 0x01404000 0x01414000
|
||
|
|
0 0x140 0x01404000 0x01414000
|
||
|
|
0 0x144 0x01404000 0x01414000>;
|
||
|
|
};
|
||
|
|
spi4_prod {
|
||
|
|
nvidia,prod-boot-init;
|
||
|
|
prod = <0 0x268 0x01404000 0x01414000
|
||
|
|
0 0x26c 0x01404000 0x01414000
|
||
|
|
0 0x270 0x01404000 0x01414000
|
||
|
|
0 0x274 0x01404000 0x01414000>;
|
||
|
|
};
|
||
|
|
i2c0_prod {
|
||
|
|
nvidia,prod-boot-init;
|
||
|
|
prod = <0 0xD4 0x01F1F000 0x0001F000
|
||
|
|
0 0xD8 0x01F1F000 0x0001F000
|
||
|
|
1 0xBC 0x00001100 0x00000000
|
||
|
|
1 0xC0 0x00001100 0x00000000>;
|
||
|
|
};
|
||
|
|
i2c1_prod {
|
||
|
|
nvidia,prod-boot-init;
|
||
|
|
prod = <0 0xDC 0x01F1F000 0x0001F000
|
||
|
|
0 0xE0 0x01F1F000 0x0001F000
|
||
|
|
1 0xC4 0x00001100 0x00000000
|
||
|
|
1 0xC8 0x00001100 0x00000000>;
|
||
|
|
};
|
||
|
|
i2c2_prod {
|
||
|
|
nvidia,prod-boot-init;
|
||
|
|
prod = <0 0xE4 0x01F1F000 0x0001F000
|
||
|
|
0 0xE8 0x01F1F000 0x0001F000
|
||
|
|
1 0xCC 0x00001100 0x00000000
|
||
|
|
1 0xD0 0x00001100 0x00000000
|
||
|
|
0 0x60 0x01F1F000 0x0001F000
|
||
|
|
0 0x64 0x01F1F000 0x0001F000
|
||
|
|
1 0xD4 0x00001100 0x00000000
|
||
|
|
1 0xD8 0x00001100 0x00000000>;
|
||
|
|
};
|
||
|
|
i2c4_prod {
|
||
|
|
nvidia,prod-boot-init;
|
||
|
|
prod = <0 0x198 0x01F1F000 0x0001F000
|
||
|
|
0 0x19C 0x01F1F000 0x0001F000
|
||
|
|
1 0xDC 0x00001100 0x00000000
|
||
|
|
1 0xE0 0x00001100 0x00000000>;
|
||
|
|
};
|
||
|
|
i2c0_hs_prod {
|
||
|
|
prod = <0 0xD4 0x01F1F000 0x01F1F000
|
||
|
|
0 0xD8 0x01F1F000 0x01F1F000
|
||
|
|
1 0xBC 0x00001100 0x00001000
|
||
|
|
1 0xC0 0x00001100 0x00001000>;
|
||
|
|
};
|
||
|
|
i2c1_hs_prod {
|
||
|
|
prod = <0 0xDC 0x01F1F000 0x01F1F000
|
||
|
|
0 0xE0 0x01F1F000 0x01F1F000
|
||
|
|
1 0xC4 0x00001100 0x00001000
|
||
|
|
1 0xC8 0x00001100 0x00001000>;
|
||
|
|
};
|
||
|
|
i2c2_hs_prod {
|
||
|
|
prod = <0 0xE4 0x01F1F000 0x01F1F000
|
||
|
|
0 0xE8 0x01F1F000 0x01F1F000
|
||
|
|
1 0xCC 0x00001100 0x00001000
|
||
|
|
1 0xD0 0x00001100 0x00001000
|
||
|
|
0 0x60 0x01F1F000 0x01F1F000
|
||
|
|
0 0x64 0x01F1F000 0x01F1F000
|
||
|
|
1 0xD4 0x00001100 0x00001000
|
||
|
|
1 0xD8 0x00001100 0x00001000>;
|
||
|
|
};
|
||
|
|
i2c4_hs_prod {
|
||
|
|
prod = <0 0x198 0x01F1F000 0x01F1F000
|
||
|
|
0 0x19C 0x01F1F000 0x01F1F000
|
||
|
|
1 0xDC 0x00001100 0x00001000
|
||
|
|
1 0xE0 0x00001100 0x00001000>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
spi@7000d400 {
|
||
|
|
prod-settings {
|
||
|
|
#prod-cells = <3>;
|
||
|
|
prod {
|
||
|
|
prod = <0x04 0x00000fff 0x0>;
|
||
|
|
};
|
||
|
|
prod_c_flash {
|
||
|
|
status = "disabled";
|
||
|
|
/* enabled for spi flash rom */
|
||
|
|
prod = <0x04 0x0000003f 0x00000007>;
|
||
|
|
};
|
||
|
|
prod_c_loop {
|
||
|
|
status = "disabled";
|
||
|
|
/* enabled for spi loopback mode */
|
||
|
|
prod = <0x04 0x00000fff 0x0000044b>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
spi@7000d600 {
|
||
|
|
prod-settings {
|
||
|
|
#prod-cells = <3>;
|
||
|
|
prod {
|
||
|
|
prod = <0x04 0x00000fff 0x0>;
|
||
|
|
};
|
||
|
|
prod_c_flash {
|
||
|
|
status = "disabled";
|
||
|
|
/* enabled for spi flash rom */
|
||
|
|
prod = <0x04 0x0000003f 0x00000006>;
|
||
|
|
};
|
||
|
|
prod_c_loop {
|
||
|
|
status = "disabled";
|
||
|
|
/* enabled for spi loopback mode */
|
||
|
|
prod = <0x04 0x00000fff 0x0000044b>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
spi@7000d800 {
|
||
|
|
prod-settings {
|
||
|
|
#prod-cells = <3>;
|
||
|
|
prod {
|
||
|
|
prod = <0x04 0x00000fff 0x0>;
|
||
|
|
};
|
||
|
|
prod_c_flash {
|
||
|
|
status = "disabled";
|
||
|
|
/* enabled for spi flash rom */
|
||
|
|
prod = <0x04 0x0000003f 0x00000008>;
|
||
|
|
};
|
||
|
|
prod_c_loop {
|
||
|
|
status = "disabled";
|
||
|
|
/* enabled for spi loopback mode */
|
||
|
|
prod = <0x04 0x00000fff 0x0000044b>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
spi@7000da00 {
|
||
|
|
prod-settings {
|
||
|
|
#prod-cells = <3>;
|
||
|
|
prod {
|
||
|
|
prod = <0x04 0x00000fff 0x0>;
|
||
|
|
};
|
||
|
|
prod_c_flash {
|
||
|
|
status = "disabled";
|
||
|
|
/* enabled for spi loopback mode */
|
||
|
|
prod = <0x04 0x00000fff 0x0000044b>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
#if TEGRA_XUSB_PADCONTROL_VERSION >= DT_VERSION_2
|
||
|
|
xusb_padctl@7009f000 {
|
||
|
|
#else
|
||
|
|
pinctrl@7009f000 {
|
||
|
|
#endif
|
||
|
|
prod-settings {
|
||
|
|
#prod-cells = <4>;
|
||
|
|
prod_c_bias {
|
||
|
|
prod = <
|
||
|
|
0 0x00000284 0x0000003f 0x0000003a
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
prod_c_bias_a02 {
|
||
|
|
prod = <
|
||
|
|
0 0x00000284 0x0000003f 0x00000038
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
prod_c_utmi0 {
|
||
|
|
prod = <
|
||
|
|
0 0x00000084 0x00000020 0x00000040
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
prod_c_utmi1 {
|
||
|
|
prod = <
|
||
|
|
0 0x000000C4 0x00000020 0x00000040
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
prod_c_utmi2 {
|
||
|
|
prod = <
|
||
|
|
0 0x00000104 0x00000020 0x00000040
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
prod_c_utmi3 {
|
||
|
|
prod = <
|
||
|
|
0 0x00000144 0x00000020 0x00000040
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
prod_c_ss0 {
|
||
|
|
prod = <
|
||
|
|
0 0x00000a60 0x00030000 0x00020000
|
||
|
|
0 0x00000a64 0x0000ffff 0x000000fc
|
||
|
|
0 0x00000a68 0xffffffff 0xc0077f1f
|
||
|
|
0 0x00000a74 0xffffffff 0xfcf01368
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
prod_c_ss1 {
|
||
|
|
prod = <
|
||
|
|
0 0x00000aa0 0x00030000 0x00020000
|
||
|
|
0 0x00000aa4 0x0000ffff 0x000000fc
|
||
|
|
0 0x00000aa8 0xffffffff 0xc0077f1f
|
||
|
|
0 0x00000ab4 0xffffffff 0xfcf01368
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
prod_c_ss2 {
|
||
|
|
prod = <
|
||
|
|
0 0x00000ae0 0x00030000 0x00020000
|
||
|
|
0 0x00000ae4 0x0000ffff 0x000000fc
|
||
|
|
0 0x00000ae8 0xffffffff 0xc0077f1f
|
||
|
|
0 0x00000af4 0xffffffff 0xfcf01368
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
prod_c_ss3 {
|
||
|
|
prod = <
|
||
|
|
0 0x00000b20 0x00030000 0x00020000
|
||
|
|
0 0x00000b24 0x0000ffff 0x000000fc
|
||
|
|
0 0x00000b28 0xffffffff 0xc0077f1f
|
||
|
|
0 0x00000b34 0xffffffff 0xfcf01368
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
prod_c_hsic0 {
|
||
|
|
prod = <
|
||
|
|
0 0x00000344 0x0000001f 0x0000001c
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
prod_c_hsic1 {
|
||
|
|
prod = <
|
||
|
|
0 0x00000344 0x0000001f 0x0000001c
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
sata@70020000 {
|
||
|
|
prod-settings {
|
||
|
|
#prod-cells = <4>;
|
||
|
|
prod {
|
||
|
|
prod = <
|
||
|
|
0 0x00000680 0x00000001 0x00000001 // SATA_CHX_INDEX_0 0
|
||
|
|
0 0x00000690 0x00000FFF 0x00000715 // SATA_CHX_PHY_CTRL1_GEN1_0 31:0
|
||
|
|
0 0x00000694 0x000FF0FF 0x0000E01B // SATA_CHX_PHY_CTRL1_GEN2_0 31:0
|
||
|
|
0 0x000006d0 0xFFFFFFFF 0x00AB000F // SATA_CHX_PHY_CTRL11_0 31:0
|
||
|
|
0 0x00000170 0x0000F000 0x00007000 // NV_PROJ_SATA_FIFO_0 15:12
|
||
|
|
2 0x00000960 0x03000000 0x01000000 // XUSB_PADCTL_UPHY_MISC_PAD_S0_CTL_1_0 25:24
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
pcie@1003000 {
|
||
|
|
prod-settings {
|
||
|
|
#prod-cells = <3>;
|
||
|
|
prod_c_pad {
|
||
|
|
prod = <
|
||
|
|
0x000000C8 0xFFFFFFFF 0x90b890b8 // PADS_REFCLK_CFG0 31:0 0x90b890b8
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
prod_c_rp {
|
||
|
|
prod = <
|
||
|
|
0x00000E84 0x0000FFFF 0x0000000F // RP_ECTL_2_R1_0 15:0=RX_CTLE_1C 0x000F
|
||
|
|
0x00000EA4 0x0000FFFF 0x0000008F // RP_ECTL_2_R2_0 15:0=RX_CTLE_1C 0x008F
|
||
|
|
0x00000E90 0xFFFFFFFF 0x55010000 // RP_ECTL_5_R1_0 31:0=RX_EQ_CTRL_L_1C 0x55010000
|
||
|
|
0x00000E94 0xFFFFFFFF 0x00000001 // RP_ECTL_6_R1_0 31:0=RX_EQ_CTRL_H_1C 0x00000001
|
||
|
|
0x00000EB0 0xFFFFFFFF 0x55010000 // RP_ECTL_5_R2_0 31:0=RX_EQ_CTRL_L_1C 0x55010000
|
||
|
|
0x00000EB4 0xFFFFFFFF 0x00000001 // RP_ECTL_6_R2_0 31:0=RX_EQ_CTRL_H_1C 0x00000001
|
||
|
|
0x00000E8C 0xFFFF0000 0x00670000 // RP_ECTL_4_R1_0 31:16=RX_CDR_CTRL_1C 0x0067
|
||
|
|
0x00000EAC 0xFFFF0000 0x00C70000 // RP_ECTL_4_R2_0 31:16=RX_CDR_CTRL_1C 0x00C7
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
sdhci@700b0600 {
|
||
|
|
prod-settings {
|
||
|
|
#prod-cells = <3>;
|
||
|
|
|
||
|
|
prod_c_ds {
|
||
|
|
prod = <0x00000100 0x00FF0000 0x00040000
|
||
|
|
0x000001E0 0x0000000F 0x00000007
|
||
|
|
0x000001E4 0x30077F7F 0x30000505>;
|
||
|
|
};
|
||
|
|
prod_c_hs {
|
||
|
|
prod = <0x00000100 0x00FF0000 0x00040000
|
||
|
|
0x000001E0 0x0000000F 0x00000007
|
||
|
|
0x000001E4 0x30077F7F 0x30000505>;
|
||
|
|
};
|
||
|
|
prod_c_ddr52 {
|
||
|
|
prod = <0x00000100 0x1FFF0000 0x00000000
|
||
|
|
0x000001E0 0x0000000F 0x00000007
|
||
|
|
0x000001E4 0x30077F7F 0x30000505>;
|
||
|
|
};
|
||
|
|
prod_c_hs200 {
|
||
|
|
prod = <0x00000100 0x00FF0000 0x00040000
|
||
|
|
0x000001C0 0x0000E000 0x00004000
|
||
|
|
0x000001E0 0x0000000F 0x00000007
|
||
|
|
0x000001E4 0x30077F7F 0x30000505>;
|
||
|
|
};
|
||
|
|
prod_c_hs400 {
|
||
|
|
prod = <0x00000100 0x00FF0000 0x00040000
|
||
|
|
0x000001C0 0x0000E000 0x00004000
|
||
|
|
0x000001E0 0x0000000F 0x00000007
|
||
|
|
0x000001E4 0x30077F7F 0x30000505>;
|
||
|
|
};
|
||
|
|
prod_c_hs533 {
|
||
|
|
prod = <0x00000100 0x00FF0000 0x00040000
|
||
|
|
0x000001C0 0x0000E000 0x00002000
|
||
|
|
0x000001E0 0x0000000F 0x00000007
|
||
|
|
0x000001E4 0x30000505 0x30000505>;
|
||
|
|
};
|
||
|
|
|
||
|
|
|
||
|
|
prod {
|
||
|
|
prod = <
|
||
|
|
0x0000100 0x1FFF000E 0x8090028 // SDMMC_VENDOR_CLOCK_CNTRL_0 28:24=TRIM_VAL 0x5
|
||
|
|
// 23:16=TAP_VAL 0x9
|
||
|
|
// 05:05=SDR50_TUNING_OVERRIDE 0x1
|
||
|
|
// 03:03=PADPIPE_CLKEN_OVERRIDE 0x1
|
||
|
|
// 02:02=SPI_MODE_CLKEN_OVERRIDE 0x0
|
||
|
|
// 01:01=INPUT_IO_CLK 0x0
|
||
|
|
0x0000010C 0x00003F00 0x00002800 //SDMMC_VENDOR_CAP_OVERRIDES_0 13:8=DQS_TRIM_VAL 0x28
|
||
|
|
0x00001C0 0x08001FC0 0x8000040 // SDMMC_VENDOR_TUNING_CNTRL0_0 12:06=MUL_M 0x1
|
||
|
|
// 27:27=RETUNING_REQ_EN_ON_CRC_ERR_DETECTION 0x1
|
||
|
|
0x00001C4 0x00000077 0x0 // SDMMC_VENDOR_TUNING_CNTRL1_0 02:00=STEP_SIZE_SDR50 0x0
|
||
|
|
// 06:04=STEP_SIZE_SDR104_HS200 0x0
|
||
|
|
0x0000120 0x00020001 0x00001 // SDMMC_VENDOR_MISC_CNTRL_0 0:0=ERASE_TIMEOUT_LIMIT 0x1
|
||
|
|
// 17:17=SDMMC_SPARE1[1] 0x0
|
||
|
|
0x0000128 0x43000000 0x00000000 // SDMMC_VENDOR_MISC_CNTRL2_0 30:30=SDMMC_CLK_OVR_ON 0x0
|
||
|
|
// 25:25=ADMA3_CLKEN_OVERRIDE 0x0
|
||
|
|
// 24:24=CQE_CLKEN_OVERRIDE 0x0
|
||
|
|
0x00001F0 0x00080000 0x00080000 // SDMMC_IO_SPARE_0 19:19=SPARE_OUT[3] 0x1
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
sdhci@700b0400 {
|
||
|
|
prod-settings {
|
||
|
|
#prod-cells = <3>;
|
||
|
|
|
||
|
|
prod_c_ds {
|
||
|
|
prod = <0x00000100 0x00FF0000 0x00010000
|
||
|
|
0x000001E0 0x0000000F 0x00000007
|
||
|
|
0x000001E4 0x30077F7F 0x3000007D>;
|
||
|
|
};
|
||
|
|
prod_c_hs {
|
||
|
|
prod = <0x00000100 0x00FF0000 0x00010000
|
||
|
|
0x000001E0 0x0000000F 0x00000007
|
||
|
|
0x000001E4 0x30077F7F 0x3000007D>;
|
||
|
|
};
|
||
|
|
prod_c_sdr12 {
|
||
|
|
prod = <0x00000100 0x00FF0000 0x00010000
|
||
|
|
0x000001E0 0x0000000F 0x00000007
|
||
|
|
0x000001E4 0x30077F7F 0x30007B7B>;
|
||
|
|
};
|
||
|
|
prod_c_sdr25 {
|
||
|
|
prod = <0x00000100 0x00FF0000 0x00010000
|
||
|
|
0x000001E0 0x0000000F 0x00000007
|
||
|
|
0x000001E4 0x30077F7F 0x30007B7B>;
|
||
|
|
};
|
||
|
|
prod_c_sdr50 {
|
||
|
|
prod = <0x00000100 0x00FF0000 0x00010000
|
||
|
|
0x000001C0 0x0000E000 0x00008000
|
||
|
|
0x000001E0 0x0000000F 0x00000007
|
||
|
|
0x000001E4 0x30077F7F 0x30007B7B>;
|
||
|
|
};
|
||
|
|
prod_c_sdr104 {
|
||
|
|
prod = <0x00000100 0x00FF0000 0x00010000
|
||
|
|
0x000001C0 0x0000E000 0x00004000
|
||
|
|
0x000001E0 0x0000000F 0x00000007
|
||
|
|
0x000001E4 0x30077F7F 0x30007B7B>;
|
||
|
|
};
|
||
|
|
prod_c_ddr52 {
|
||
|
|
prod = <0x00000100 0x1FFF0000 0x00000000
|
||
|
|
0x000001E0 0x0000000F 0x00000007
|
||
|
|
0x000001E4 0x30077F7F 0x30007B7B>;
|
||
|
|
};
|
||
|
|
|
||
|
|
prod {
|
||
|
|
prod = <
|
||
|
|
0x0000100 0x1FFF000E 0x3090028 // SDMMC_VENDOR_CLOCK_CNTRL_0 28:24=TRIM_VAL 0x5
|
||
|
|
// 23:16=TAP_VAL 0x9
|
||
|
|
// 05:05=SDR50_TUNING_OVERRIDE 0x1
|
||
|
|
// 03:03=PADPIPE_CLKEN_OVERRIDE 0x1
|
||
|
|
// 02:02=SPI_MODE_CLKEN_OVERRIDE 0x0
|
||
|
|
// 01:01=INPUT_IO_CLK 0x0
|
||
|
|
0x00001C0 0x08001FC0 0x8000040 // SDMMC_VENDOR_TUNING_CNTRL0_0 12:06=MUL_M 0x1
|
||
|
|
// 27:27=RETUNING_REQ_EN_ON_CRC_ERR_DETECTION 0x1
|
||
|
|
0x00001C4 0x00000077 0x0 // SDMMC_VENDOR_TUNING_CNTRL1_0 02:00=STEP_SIZE_SDR50 0x0
|
||
|
|
// 06:04=STEP_SIZE_SDR104_HS200 0x0
|
||
|
|
0x0000120 0x00020001 0x00001 // SDMMC_VENDOR_MISC_CNTRL_0 0:0=ERASE_TIMEOUT_LIMIT 0x1
|
||
|
|
// 17:17=SDMMC_SPARE1[1] 0x0
|
||
|
|
0x0000128 0x43000000 0x00000000 // SDMMC_VENDOR_MISC_CNTRL2_0 30:30=SDMMC_CLK_OVR_ON 0x0
|
||
|
|
// 25:25=ADMA3_CLKEN_OVERRIDE 0x0
|
||
|
|
// 24:24=CQE_CLKEN_OVERRIDE 0x0
|
||
|
|
0x00001F0 0x00080000 0x00080000 // SDMMC_IO_SPARE_0 19:19=SPARE_OUT[3] 0x1
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
sdhci@700b0200 {
|
||
|
|
prod-settings {
|
||
|
|
#prod-cells = <3>;
|
||
|
|
|
||
|
|
prod_c_ds {
|
||
|
|
prod = <0x00000100 0x00FF0000 0x00040000
|
||
|
|
0x000001E0 0x0000000F 0x00000007
|
||
|
|
0x000001E4 0x30077F7F 0x30000505>;
|
||
|
|
};
|
||
|
|
prod_c_hs {
|
||
|
|
prod = <0x00000100 0x00FF0000 0x00040000
|
||
|
|
0x000001E0 0x0000000F 0x00000007
|
||
|
|
0x000001E4 0x30077F7F 0x30000505>;
|
||
|
|
};
|
||
|
|
prod_c_sdr12 {
|
||
|
|
prod = <0x00000100 0x00FF0000 0x00040000
|
||
|
|
0x000001E0 0x0000000F 0x00000007
|
||
|
|
0x000001E4 0x30077F7F 0x30000505>;
|
||
|
|
};
|
||
|
|
prod_c_sdr25 {
|
||
|
|
prod = <0x00000100 0x00FF0000 0x00040000
|
||
|
|
0x000001E0 0x0000000F 0x00000007
|
||
|
|
0x000001E4 0x30077F7F 0x30000505>;
|
||
|
|
};
|
||
|
|
prod_c_sdr50 {
|
||
|
|
prod = <0x00000100 0x00FF0000 0x00040000
|
||
|
|
0x000001C0 0x0000E000 0x00008000
|
||
|
|
0x000001E0 0x0000000F 0x00000007
|
||
|
|
0x000001E4 0x30077F7F 0x30000505>;
|
||
|
|
};
|
||
|
|
prod_c_sdr104 {
|
||
|
|
prod = <0x00000100 0x00FF0000 0x00040000
|
||
|
|
0x000001C0 0x0000E000 0x00004000
|
||
|
|
0x000001E0 0x0000000F 0x00000007
|
||
|
|
0x000001E4 0x30077F7F 0x30000505>;
|
||
|
|
};
|
||
|
|
prod_c_ddr52 {
|
||
|
|
prod = <0x00000100 0x1FFF0000 0x00040000
|
||
|
|
0x000001E0 0x0000000F 0x00000007
|
||
|
|
0x000001E4 0x30077F7F 0x30000505>;
|
||
|
|
};
|
||
|
|
prod_c_hs200 {
|
||
|
|
prod = <0x00000100 0x00FF0000 0x00040000
|
||
|
|
0x000001C0 0x0000E000 0x00004000
|
||
|
|
0x000001E0 0x0000000F 0x00000007
|
||
|
|
0x000001E4 0x30077F7F 0x30000505>;
|
||
|
|
};
|
||
|
|
prod_c_hs400 {
|
||
|
|
prod = <0x00000100 0x00FF0000 0x00040000
|
||
|
|
0x000001C0 0x0000E000 0x00004000
|
||
|
|
0x000001E0 0x0000000F 0x00000007
|
||
|
|
0x000001E4 0x30077F7F 0x30000505>;
|
||
|
|
};
|
||
|
|
prod_c_hs533 {
|
||
|
|
prod = <0x00000100 0x00FF0000 0x00040000
|
||
|
|
0x000001C0 0x0000E000 0x00002000
|
||
|
|
0x000001E0 0x0000000F 0x00000007
|
||
|
|
0x000001E4 0x30000505 0x30000505>;
|
||
|
|
};
|
||
|
|
|
||
|
|
prod {
|
||
|
|
prod = <
|
||
|
|
0x0000100 0x1FFF000E 0x8090028 // SDMMC_VENDOR_CLOCK_CNTRL_0 28:24=TRIM_VAL 0x5
|
||
|
|
// 23:16=TAP_VAL 0x9
|
||
|
|
// 05:05=SDR50_TUNING_OVERRIDE 0x1
|
||
|
|
// 03:03=PADPIPE_CLKEN_OVERRIDE 0x1
|
||
|
|
// 02:02=SPI_MODE_CLKEN_OVERRIDE 0x0
|
||
|
|
// 01:01=INPUT_IO_CLK 0x0
|
||
|
|
0x00001C0 0x08001FC0 0x8000040 // SDMMC_VENDOR_TUNING_CNTRL0_0 12:06=MUL_M 0x1
|
||
|
|
// 27:27=RETUNING_REQ_EN_ON_CRC_ERR_DETECTION 0x1
|
||
|
|
0x00001C4 0x00000077 0x0 // SDMMC_VENDOR_TUNING_CNTRL1_0 02:00=STEP_SIZE_SDR50 0x0
|
||
|
|
// 06:04=STEP_SIZE_SDR104_HS200 0x0
|
||
|
|
0x0000120 0x00020001 0x00001 // SDMMC_VENDOR_MISC_CNTRL_0 0:0=ERASE_TIMEOUT_LIMIT 0x1
|
||
|
|
// 17:17=SDMMC_SPARE1[1] 0x0
|
||
|
|
0x0000128 0x43000000 0x00000000 // SDMMC_VENDOR_MISC_CNTRL2_0 30:30=SDMMC_CLK_OVR_ON 0x0
|
||
|
|
// 25:25=ADMA3_CLKEN_OVERRIDE 0x0
|
||
|
|
// 24:24=CQE_CLKEN_OVERRIDE 0x0
|
||
|
|
0x00001F0 0x00080000 0x00080000 // SDMMC_IO_SPARE_0 19:19=SPARE_OUT[3] 0x1
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
sdhci@700b0000 {
|
||
|
|
prod-settings {
|
||
|
|
#prod-cells = <3>;
|
||
|
|
|
||
|
|
prod_c_ds {
|
||
|
|
prod = <0x00000100 0x00FF0000 0x00040000
|
||
|
|
0x000001E0 0x0000000F 0x00000007
|
||
|
|
0x000001E4 0x30077F7F 0x3000007D>;
|
||
|
|
};
|
||
|
|
prod_c_hs {
|
||
|
|
prod = <0x00000100 0x00FF0000 0x00040000
|
||
|
|
0x000001E0 0x0000000F 0x00000007
|
||
|
|
0x000001E4 0x30077F7F 0x3000007D>;
|
||
|
|
};
|
||
|
|
prod_c_sdr12 {
|
||
|
|
prod = <0x00000100 0x00FF0000 0x00040000
|
||
|
|
0x000001E0 0x0000000F 0x00000007
|
||
|
|
0x000001E4 0x30077F7F 0x30007B7B>;
|
||
|
|
};
|
||
|
|
prod_c_sdr25 {
|
||
|
|
prod = <0x00000100 0x00FF0000 0x00040000
|
||
|
|
0x000001E0 0x0000000F 0x00000007
|
||
|
|
0x000001E4 0x30077F7F 0x30007B7B>;
|
||
|
|
};
|
||
|
|
prod_c_sdr50 {
|
||
|
|
prod = <0x00000100 0x00FF0000 0x00040000
|
||
|
|
0x000001C0 0x0000E000 0x00008000
|
||
|
|
0x000001E0 0x0000000F 0x00000007
|
||
|
|
0x000001E4 0x30077F7F 0x30007B7B>;
|
||
|
|
};
|
||
|
|
prod_c_sdr104 {
|
||
|
|
prod = <0x00000100 0x00FF0000 0x00040000
|
||
|
|
0x000001C0 0x0000E000 0x00004000
|
||
|
|
0x000001E0 0x0000000F 0x00000007
|
||
|
|
0x000001E4 0x30077F7F 0x30007B7B>;
|
||
|
|
};
|
||
|
|
prod_c_ddr52 {
|
||
|
|
prod = <0x00000100 0x1FFF0000 0x00000000
|
||
|
|
0x000001E0 0x0000000F 0x00000007
|
||
|
|
0x000001E4 0x30077F7F 0x30007B7B>;
|
||
|
|
};
|
||
|
|
|
||
|
|
|
||
|
|
prod {
|
||
|
|
prod = <
|
||
|
|
0x0000100 0x1FFF000E 0x2090028 // SDMMC_VENDOR_CLOCK_CNTRL_0 28:24=TRIM_VAL 0x5
|
||
|
|
// 23:16=TAP_VAL 0x9
|
||
|
|
// 05:05=SDR50_TUNING_OVERRIDE 0x1
|
||
|
|
// 03:03=PADPIPE_CLKEN_OVERRIDE 0x1
|
||
|
|
// 02:02=SPI_MODE_CLKEN_OVERRIDE 0x0
|
||
|
|
// 01:01=INPUT_IO_CLK 0x0
|
||
|
|
0x00001C0 0x08001FC0 0x8000040 // SDMMC_VENDOR_TUNING_CNTRL0_0 12:06=MUL_M 0x1
|
||
|
|
// 27:27=RETUNING_REQ_EN_ON_CRC_ERR_DETECTION 0x1
|
||
|
|
0x00001C4 0x00000077 0x0 // SDMMC_VENDOR_TUNING_CNTRL1_0 02:00=STEP_SIZE_SDR50 0x0
|
||
|
|
// 06:04=STEP_SIZE_SDR104_HS200 0x0
|
||
|
|
0x0000120 0x00020001 0x00001 // SDMMC_VENDOR_MISC_CNTRL_0 0:0=ERASE_TIMEOUT_LIMIT 0x1
|
||
|
|
// 17:17=SDMMC_SPARE1[1] 0x0
|
||
|
|
0x0000128 0x43000000 0x00000000 // SDMMC_VENDOR_MISC_CNTRL2_0 30:30=SDMMC_CLK_OVR_ON 0x0
|
||
|
|
// 25:25=ADMA3_CLKEN_OVERRIDE 0x0
|
||
|
|
// 24:24=CQE_CLKEN_OVERRIDE 0x0
|
||
|
|
0x00001F0 0x00080000 0x00080000 // SDMMC_IO_SPARE_0 19:19=SPARE_OUT[3] 0x1
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
mipical {
|
||
|
|
prod-settings {
|
||
|
|
#prod-cells = <3>;
|
||
|
|
prod_c_dphy_dsi {
|
||
|
|
prod = <
|
||
|
|
0x00000038 0x00001f00 0x00000200 //MIPI_CAL_DSIA_MIPI_CAL_CONFIG_0 12:8=MIPI_CAL_HSPUOSDSIA 0x2
|
||
|
|
0x0000003c 0x00001f00 0x00000200 //MIPI_CAL_DSIB_MIPI_CAL_CONFIG_0 12:8=MIPI_CAL_HSPUOSDSIB 0x2
|
||
|
|
0x00000040 0x00001f00 0x00000200 //MIPI_CAL_DSIC_MIPI_CAL_CONFIG_0 12:8=MIPI_CAL_HSPUOSDSIC 0x2
|
||
|
|
0x00000044 0x00001f00 0x00000200 //MIPI_CAL_DSID_MIPI_CAL_CONFIG_0 12:8=MIPI_CAL_HSPUOSDSID 0x2
|
||
|
|
|
||
|
|
0x0000005c 0x00000f00 0x00000300 //MIPI_CAL_MIPI_BIAS_PAD_CFG1_0 11:8=PAD_DRIV_UP_REF 0x3
|
||
|
|
0x00000060 0x000f00f0 0x00010010 //MIPI_CAL_MIPI_BIAS_PAD_CFG2_0 07:04=PAD_VAUXP_LEVEL 0x1
|
||
|
|
// 19:16=PAD_VCLAMP_LEVEL 0x1
|
||
|
|
0x00000064 0x0000001f 0x00000002 //MIPI_CAL_DSIA_MIPI_CAL_CONFIG_2_0 04:00=MIPI_CAL_HSCLKPUOSDSIA 0x2
|
||
|
|
0x00000068 0x0000001f 0x00000002 //MIPI_CAL_DSIB_MIPI_CAL_CONFIG_2_0 04:00=MIPI_CAL_HSCLKPUOSDSIB 0x2
|
||
|
|
0x00000070 0x0000001f 0x00000002 //MIPI_CAL_DSIC_MIPI_CAL_CONFIG_2_0 04:00=MIPI_CAL_HSCLKPUOSDSIC 0x2
|
||
|
|
0x00000074 0x0000001f 0x00000002 //MIPI_CAL_DSID_MIPI_CAL_CONFIG_2_0 04:00=MIPI_CAL_HSCLKPUOSDSID 0x2
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
|