41 lines
1.7 KiB
Plaintext
41 lines
1.7 KiB
Plaintext
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Tegra ADSP bindings
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-------------------
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The Audio DSP (ADSP) handles audio related modules.
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Required properties:
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- compatible: should be set to "nvidia,tegra210-adsp" for t210
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- reg: should contain ADSP registers' location and length
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- nvidia,adsp_mem: should contain Memory address and sizes of ADSP OS, APP, ARAM
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- nvidia,adsp_unit_fpga: should be added if ADSP is on Unit-FPGA
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- nvidia,adsp_unit_fpga_reset: should be added if ADSP is on Unit-FPGA. The first element
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contains the ASSERT value and the second element should
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contain the DEASSERT value. The ASSERT is ignored if the
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value is equal to 0.
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- nvidia,adsp-evp-base: should contain the base EVP address and the size of EVP in bytes
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Optional properties:
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- nvidia,adsp_freq: should contain adsp boot up freq, multiple of 51.2 MHz
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- nvidia,ape_freq: should contain ape boot up freq, half of adsp_freq
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- nvidia,ape_emc_freq: should contain appropriate emc freq w.r.t above
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adsp and ape freq
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Example:
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adsp {
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compatible = "nvidia,tegra210-adsp";
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reg = <0x0 0x702ef000 0x0 0x1000>, /* AMC */
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<0x0 0x702ec000 0x0 0x2000>, /* AMISC */
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<0x0 0x702ee000 0x0 0x1000>, /* ABRIDGE */
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<0x0 0x702dc800 0x0 0x0>, /* FPGA RESET REG */
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<0x0 0x01000000 0x0 0x6f2c0000>, /* DRAM MAP1 */
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<0x0 0x70300000 0x0 0x8fd00000>; /* DRAM MAP2 */
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nvidia,adsp_mem = <0x80300000 0x01000000>, /* ADSP OS */
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<0x80B00000 0x00800000>; /* ADSP APP */
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nvidia,adsp_unit_fpga_reset = <0x0 0x00000040>;
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nvidia,adsp_mem = <0x80300000 0x1000>;
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nvidia,adsp_freq = <819000>; /* in KHz */
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nvidia,ape_freq = <409500>; /* in KHz */
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nvidia,ape_emc_freq = <102000>; /* in KHz */
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nvidia,adsp-evp-base = <0x702ef700 0x00000040>;
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};
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