29 lines
1.3 KiB
Plaintext
29 lines
1.3 KiB
Plaintext
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Combined uart is a tegra-specific mechanism used to multiplex a single physical
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UART between multiple pieces of software. Instead of having Linux access the
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UART registers directly, this mechanism involves Linux writing debug output to
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an HSP mailbox register. Debug input is similarly received from a different HSP
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mailbox register.
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The debug data is received by a different processor, which then collects the
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debug outputs from multiple processors and multiplexes them over the actual
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physical UART. Input data is also received by the same processor, which
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forwards it to the correct destination.
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The combined uart device tree node contains the necessary data for the driver
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to operate correctly.
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Required properties:
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- compatible: Should be "nvidia,tegra186-combined-uart".
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- reg: Must contain the base address of mailbox registers.
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-- Reg0: Must contain the RX mailbox base address
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-- Reg1: Must contain the TX mailbox base address
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-- Reg2: Must contain the HSP base address that has the RX interrupt control
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register.
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- interrupts: Must contain the RX interrupt number
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Optional properties:
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- console-port: Should be present if the Tegra FIQ debugger needs to use this
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combined uart node for debug I/O.
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- combined-uart: Should be present if the Tegra FIQ debugger needs to use this
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combined uart node for debug I/O.
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