248 lines
7.2 KiB
C
248 lines
7.2 KiB
C
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/*
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* Tegra host1x Interrupt Management
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*
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* Copyright (C) 2010 Google, Inc.
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* Copyright (C) 2016 NVIDIA Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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#include "intr.h"
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#include "dev.h"
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static inline u32 bit_mask(u32 nr)
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{
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return 1UL << (nr % 32);
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}
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static inline u32 bit_word(u32 nr)
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{
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return nr / 32;
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}
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/*
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* Sync point threshold interrupt service function
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* Handles sync point threshold triggers, in interrupt context
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*/
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static void host1x_intr_syncpt_handle(struct host1x_syncpt *syncpt)
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{
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unsigned int id = syncpt->id;
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struct host1x *host = syncpt->host;
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host1x_sync_writel(host, bit_mask(id),
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HOST1X_SYNC_SYNCPT_THRESH_INT_DISABLE(bit_word(id)));
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host1x_sync_writel(host, bit_mask(id),
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HOST1X_SYNC_SYNCPT_THRESH_CPU0_INT_STATUS(bit_word(id)));
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queue_work(host->intr_wq, &syncpt->intr.work);
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}
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static irqreturn_t syncpt_thresh_isr(int irq, void *dev_id)
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{
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struct host1x *host = dev_id;
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unsigned long reg;
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int i, set_bit;
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for (i = 0; i < DIV_ROUND_UP(host->info->nb_pts, 32); i++) {
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reg = host1x_sync_readl(host,
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HOST1X_SYNC_SYNCPT_THRESH_CPU0_INT_STATUS(i));
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for_each_set_bit(set_bit, ®, 32) {
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struct host1x_syncpt *syncpt;
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int id = i * 32 + set_bit;
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if (unlikely(id < 0 || id >= host->info->nb_pts)) {
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dev_err(host->dev,
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"%s(): unexptected syncpt id %d\n",
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__func__, id);
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goto out;
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}
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syncpt = host->syncpt + id;
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host1x_intr_syncpt_handle(syncpt);
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}
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}
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out:
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return IRQ_HANDLED;
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}
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static void _host1x_intr_disable_all_syncpt_intrs(struct host1x *host)
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{
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u32 i;
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for (i = 0; i < DIV_ROUND_UP(host->info->nb_pts, 32); ++i) {
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host1x_sync_writel(host, 0xffffffffu,
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HOST1X_SYNC_SYNCPT_THRESH_INT_DISABLE(i));
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host1x_sync_writel(host, 0xffffffffu,
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HOST1X_SYNC_SYNCPT_THRESH_CPU0_INT_STATUS(i));
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}
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}
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static int _host1x_intr_init_host_sync(struct host1x *host, u32 cpm,
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void (*syncpt_thresh_work)(struct work_struct *))
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{
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int i, err;
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host1x_hw_intr_disable_all_syncpt_intrs(host);
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for (i = 0; i < host->info->nb_pts; i++)
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INIT_WORK(&host->syncpt[i].intr.work, syncpt_thresh_work);
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err = devm_request_irq(host->dev, host->intr_syncpt_irq,
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syncpt_thresh_isr, IRQF_SHARED,
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"host1x_syncpt", host);
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if (IS_ERR_VALUE(err)) {
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WARN_ON(1);
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return err;
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}
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/* disable the ip_busy_timeout. this prevents write drops */
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host1x_sync_writel(host, 0, HOST1X_SYNC_IP_BUSY_TIMEOUT);
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/*
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* increase the auto-ack timout to the maximum value. 2d will hang
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* otherwise on Tegra2.
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*/
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host1x_sync_writel(host, 0xff, HOST1X_SYNC_CTXSW_TIMEOUT_CFG);
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/* update host clocks per usec */
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host1x_sync_writel(host, cpm, HOST1X_SYNC_USEC_CLK);
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return 0;
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}
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static void _host1x_intr_set_syncpt_threshold(struct host1x *host,
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u32 id, u32 thresh)
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{
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host1x_sync_writel(host, thresh, HOST1X_SYNC_SYNCPT_INT_THRESH(id));
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}
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static void _host1x_intr_enable_syncpt_intr(struct host1x *host, u32 id)
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{
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host1x_sync_writel(host, bit_mask(id),
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HOST1X_SYNC_SYNCPT_THRESH_INT_ENABLE_CPU0(bit_word(id)));
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}
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static void _host1x_intr_disable_syncpt_intr(struct host1x *host, u32 id)
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{
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host1x_sync_writel(host, bit_mask(id),
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HOST1X_SYNC_SYNCPT_THRESH_INT_DISABLE(bit_word(id)));
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host1x_sync_writel(host, bit_mask(id),
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HOST1X_SYNC_SYNCPT_THRESH_CPU0_INT_STATUS(bit_word(id)));
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}
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static int _host1x_free_syncpt_irq(struct host1x *host)
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{
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devm_free_irq(host->dev, host->intr_syncpt_irq, host);
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flush_workqueue(host->intr_wq);
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return 0;
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}
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/**
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* Host general interrupt service function
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* Handles read / write failures
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*/
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static irqreturn_t general_isr(int irq, void *dev_id)
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{
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struct host1x *host = dev_id;
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u32 intstatus, addr;
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/* Handle host1x interrupt in ISR */
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intstatus = host1x_sync_readl(host, HOST1X_SYNC_INTSTATUS);
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if (HOST1X_SYNC_INTSTATUS_IP_READ_INT_V(intstatus)) {
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addr = host1x_sync_readl(host,
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HOST1X_SYNC_IP_READ_TIMEOUT_ADDR);
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pr_err("Host read timeout at address %x\n", addr);
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}
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if (HOST1X_SYNC_INTSTATUS_IP_WRITE_INT_V(intstatus)) {
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addr = host1x_sync_readl(host,
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HOST1X_SYNC_IP_WRITE_TIMEOUT_ADDR);
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pr_err("Host write timeout at address %x\n", addr);
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}
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if (HOST1X_SYNC_INTSTATUS_ILLEGAL_PB_ACCESS_V(intstatus)) {
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u32 stat = host1x_sync_readl(host, HOST1X_SYNC_ILLEGAL_SYNCPT_ACCESS_FRM_PB);
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u32 ch = HOST1X_SYNC_ILLEGAL_SYNCPT_ACCESS_FRM_PB_CH_V(stat);
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u32 id = HOST1X_SYNC_ILLEGAL_SYNCPT_ACCESS_FRM_PB_SYNCPT_V(stat);
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pr_err("Host illegal syncpoint pb access (ch=%u, id=%u)\n", ch, id);
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}
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if (HOST1X_SYNC_INTSTATUS_ILLEGAL_CLIENT_ACCESS_V(intstatus)) {
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u32 stat = host1x_sync_readl(host, HOST1X_SYNC_ILLEGAL_SYNCPT_ACCESS_FRM_CLIENT);
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u32 ch = HOST1X_SYNC_ILLEGAL_SYNCPT_ACCESS_FRM_CLIENT_CH_V(stat);
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u32 id = HOST1X_SYNC_ILLEGAL_SYNCPT_ACCESS_FRM_CLIENT_SYNCPT_V(stat);
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pr_err("Host illegal syncpoint client access (ch=%u, id=%u)\n", ch, id);
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}
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host1x_sync_writel(host, intstatus, HOST1X_SYNC_INTSTATUS);
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return IRQ_HANDLED;
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}
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static int _host1x_intr_request_host_general_irq(struct host1x *host)
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{
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int err;
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/* master disable for general (not syncpt) host interrupts */
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host1x_sync_writel(host, 0, HOST1X_SYNC_INTC0MASK);
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host1x_sync_writel(host, 0, HOST1X_SYNC_INTGMASK);
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host1x_sync_writel(host, 0, HOST1X_SYNC_INTMASK);
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err = devm_request_irq(host->dev, host->intr_general_irq,
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general_isr, 0,
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"host1x_general", host);
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if (IS_ERR_VALUE(err)) {
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WARN_ON(1);
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return err;
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}
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/* enable host module interrupt to CPU0 */
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host1x_sync_writel(host, BIT(0), HOST1X_SYNC_INTC0MASK);
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host1x_sync_writel(host, BIT(0), HOST1X_SYNC_INTGMASK);
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host1x_sync_writel(host, 0xff << 8, HOST1X_SYNC_SYNCPT_INTGMASK);
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/* master enable for general (not syncpt) host interrupts
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* (AXIREAD, AXIWRITE, Syncpoint protection */
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host1x_sync_writel(host, BIT(0) | BIT(1) | BIT(28) | BIT(30),
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HOST1X_SYNC_INTMASK);
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return err;
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}
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static void _host1x_intr_free_host_general_irq(struct host1x *host)
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{
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/* master disable for general (not syncpt) host interrupts */
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host1x_sync_writel(host, 0, HOST1X_SYNC_INTMASK);
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host1x_sync_writel(host, 0, HOST1X_SYNC_SYNCPT_INTGMASK);
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devm_free_irq(host->dev, host->intr_general_irq, host);
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}
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static const struct host1x_intr_ops host1x_intr_t186_ops = {
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/* Syncpt interrupts */
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.init_host_sync = _host1x_intr_init_host_sync,
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.set_syncpt_threshold = _host1x_intr_set_syncpt_threshold,
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.enable_syncpt_intr = _host1x_intr_enable_syncpt_intr,
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.disable_syncpt_intr = _host1x_intr_disable_syncpt_intr,
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.disable_all_syncpt_intrs = _host1x_intr_disable_all_syncpt_intrs,
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.free_syncpt_irq = _host1x_free_syncpt_irq,
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/* Host general interrupts */
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.request_host_general_irq = _host1x_intr_request_host_general_irq,
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.free_host_general_irq = _host1x_intr_free_host_general_irq,
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};
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