87 lines
2.5 KiB
C
87 lines
2.5 KiB
C
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/*
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* eqos_ape_global.h
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*
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* A header file for AMISC
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*
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* Copyright (C) 2016 NVIDIA Corporation. All rights reserved.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef __EQOS_APE_GLOBAL_H__
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#define __EQOS_APE_GLOBAL_H__
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#include <linux/platform_device.h>
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#include <linux/clk.h>
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#include <linux/clk/tegra.h>
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#define AMISC_IDLE_0 0x54
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#define AMISC_APE_TSC_CTRL_0_0 0xc0
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#define AMISC_APE_TSC_CTRL_NMODULE_0_0_MASK(x) (x << 16)
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#define AMISC_APE_TSC_CTRL_NFRACT_0_0_MASK(x) (x)
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#define AMISC_APE_TSC_CTRL_1_0 0xc4
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#define AMISC_APE_TSC_CTRL_NINT_1_0_MASK(x) (x)
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#define AMISC_APE_TSC_CTRL_2_0 0xc8
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#define AMISC_APE_TSC_CTRL_2_0_DIGITAL 0x3b9aca00
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#define AMISC_APE_TSC_CTRL_2_0_BINARY 0x80000000
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#define AMISC_APE_TSC_CTRL_3_0 0xcc
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#define AMISC_APE_TSC_CTRL_3_0_TRIGGER (1 << 0)
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#define AMISC_APE_TSC_CTRL_3_0_RESET (1 << 1)
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#define AMISC_APE_TSC_CTRL_3_0_COPY (1 << 2)
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#define AMISC_APE_TSC_CTRL_3_0_ENABLE (1 << 31)
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#define AMISC_APE_TSC_CTRL_3_0_DISABLE (0 << 31)
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#define AMISC_APE_RT_TSC_NS_0 0xd0
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#define AMISC_APE_RT_TSC_SEC_0 0xd4
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#define AMISC_APE_SNAP_TSC_NS_0 0xd8
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#define AMISC_APE_SNAP_TSC_SEC_0 0xdc
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#define AMISC_EAVB_SNAP_TSC_NS_0 0xe0
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#define AMISC_EAVB_SNAP_TSC_SEC_0 0xe4
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enum {
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AMISC_IDLE,
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AMISC_EAVB,
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AMISC_MAX_REG,
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};
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struct eqos_drvdata {
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void __iomem **base_regs;
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struct platform_device *pdev;
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int first_sync;
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u64 ape_sec_snap;
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u64 eavb_sec_snap;
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u64 ape_ns_snap;
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u64 eavb_ns_snap;
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struct clk *pll_a_clk;
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struct clk *pll_a_out0_clk;
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struct clk *ape_clk;
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struct clk *ape_clk_parent;
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int pll_a_clk_rate;
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};
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void amisc_clk_init(void);
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void amisc_clk_deinit(void);
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u32 amisc_readl(u32 reg);
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void amisc_writel(u32 val, u32 reg);
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void amisc_idle_enable(void);
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void amisc_idle_disable(void);
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int amisc_ape_get_rate(void);
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void amisc_ape_set_rate(int rate);
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int amisc_plla_get_rate(void);
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void amisc_plla_set_rate(int rate);
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#endif /* __EQOS_APE_GLOBAL_H__ */
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