663 lines
17 KiB
C
663 lines
17 KiB
C
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/*
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* mods_pci.c - This file is part of NVIDIA MODS kernel driver.
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*
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* Copyright (c) 2008-2018, NVIDIA CORPORATION. All rights reserved.
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*
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* NVIDIA MODS kernel driver is free software: you can redistribute it and/or
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* modify it under the terms of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* NVIDIA MODS kernel driver is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with NVIDIA MODS kernel driver.
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "mods_internal.h"
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#include <linux/io.h>
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#include <linux/fs.h>
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#if defined(MODS_HAS_DMA_OPS)
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#include <linux/dma-mapping.h>
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#endif
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/************************
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* PCI ESCAPE FUNCTIONS *
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************************/
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static int mods_find_pci_dev(struct file *pfile,
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struct MODS_FIND_PCI_DEVICE_2 *p,
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int enum_non_zero_dom)
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{
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struct pci_dev *dev = NULL;
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int index = -1;
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mods_debug_printk(DEBUG_PCI,
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"find pci dev %04x:%04x, index %d\n",
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(int) p->vendor_id,
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(int) p->device_id,
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(int) p->index);
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do {
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dev = pci_get_device(p->vendor_id, p->device_id, dev);
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if (!dev)
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return -EINVAL;
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if (enum_non_zero_dom || !pci_domain_nr(dev->bus))
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++index;
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} while (index < (int)(p->index));
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p->pci_device.domain = pci_domain_nr(dev->bus);
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p->pci_device.bus = dev->bus->number;
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p->pci_device.device = PCI_SLOT(dev->devfn);
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p->pci_device.function = PCI_FUNC(dev->devfn);
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return OK;
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}
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int esc_mods_find_pci_dev_2(struct file *pfile,
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struct MODS_FIND_PCI_DEVICE_2 *p)
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{
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return mods_find_pci_dev(pfile, p, 1);
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}
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int esc_mods_find_pci_dev(struct file *pfile,
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struct MODS_FIND_PCI_DEVICE *p)
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{
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struct MODS_FIND_PCI_DEVICE_2 p2;
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int ret;
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p2.device_id = p->device_id;
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p2.vendor_id = p->vendor_id;
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p2.index = p->index;
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ret = mods_find_pci_dev(pfile, &p2, 0);
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if (!ret) {
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p->bus_number = p2.pci_device.bus;
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p->device_number = p2.pci_device.device;
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p->function_number = p2.pci_device.function;
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}
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return ret;
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}
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static int mods_find_pci_class_code(struct file *pfile,
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struct MODS_FIND_PCI_CLASS_CODE_2 *p,
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int enum_non_zero_dom)
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{
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struct pci_dev *dev = NULL;
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int index = -1;
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mods_debug_printk(DEBUG_PCI, "find pci class code %04x, index %d\n",
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(int) p->class_code, (int) p->index);
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do {
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dev = pci_get_class(p->class_code, dev);
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if (!dev)
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return -EINVAL;
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if (enum_non_zero_dom || !pci_domain_nr(dev->bus))
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++index;
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} while (index < (int)(p->index));
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p->pci_device.domain = pci_domain_nr(dev->bus);
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p->pci_device.bus = dev->bus->number;
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p->pci_device.device = PCI_SLOT(dev->devfn);
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p->pci_device.function = PCI_FUNC(dev->devfn);
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return OK;
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}
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int esc_mods_find_pci_class_code_2(struct file *pfile,
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struct MODS_FIND_PCI_CLASS_CODE_2 *p)
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{
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return mods_find_pci_class_code(pfile, p, 1);
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}
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int esc_mods_find_pci_class_code(struct file *pfile,
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struct MODS_FIND_PCI_CLASS_CODE *p)
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{
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struct MODS_FIND_PCI_CLASS_CODE_2 p2;
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int ret;
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p2.class_code = p->class_code;
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p2.index = p->index;
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ret = mods_find_pci_class_code(pfile, &p2, 0);
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if (!ret) {
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p->bus_number = p2.pci_device.bus;
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p->device_number = p2.pci_device.device;
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p->function_number = p2.pci_device.function;
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}
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return ret;
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}
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int esc_mods_pci_get_bar_info_2(struct file *pfile,
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struct MODS_PCI_GET_BAR_INFO_2 *p)
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{
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struct pci_dev *dev;
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unsigned int devfn, bar_resource_offset, i;
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#if !defined(MODS_HAS_IORESOURCE_MEM_64)
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__u32 temp;
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#endif
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devfn = PCI_DEVFN(p->pci_device.device, p->pci_device.function);
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dev = MODS_PCI_GET_SLOT(p->pci_device.domain, p->pci_device.bus, devfn);
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if (dev == NULL)
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return -EINVAL;
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mods_debug_printk(DEBUG_PCI,
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"pci get bar info %04x:%x:%02x:%x, bar index %d\n",
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(int) p->pci_device.domain,
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(int) p->pci_device.bus, (int) p->pci_device.device,
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(int) p->pci_device.function, (int) p->bar_index);
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#if defined(CONFIG_PPC64)
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if (unlikely(mutex_lock_interruptible(mods_get_irq_mutex()))) {
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LOG_EXT();
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return -EINTR;
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}
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/* Enable device on the PCI bus */
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if (mods_enable_device(pfile->private_data, dev) == 0) {
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mods_error_printk(
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"unable to enable dev %04x:%02x:%02x.%x\n",
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(unsigned int)p->pci_device.domain,
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(unsigned int)p->pci_device.bus,
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(unsigned int)p->pci_device.device,
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(unsigned int)p->pci_device.function);
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mutex_unlock(mods_get_irq_mutex());
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return -EINVAL;
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}
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mutex_unlock(mods_get_irq_mutex());
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#endif
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bar_resource_offset = 0;
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for (i = 0; i < p->bar_index; i++) {
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#if defined(MODS_HAS_IORESOURCE_MEM_64)
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if (pci_resource_flags(dev, bar_resource_offset)
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& IORESOURCE_MEM_64) {
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#else
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pci_read_config_dword(dev,
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(PCI_BASE_ADDRESS_0
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+ (bar_resource_offset * 4)),
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&temp);
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if (temp & PCI_BASE_ADDRESS_MEM_TYPE_64) {
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#endif
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bar_resource_offset += 2;
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} else {
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bar_resource_offset += 1;
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}
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}
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p->base_address = pci_resource_start(dev, bar_resource_offset);
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p->bar_size = pci_resource_len(dev, bar_resource_offset);
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return OK;
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}
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int esc_mods_pci_get_bar_info(struct file *pfile,
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struct MODS_PCI_GET_BAR_INFO *p)
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{
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int retval;
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struct MODS_PCI_GET_BAR_INFO_2 get_bar_info = { {0} };
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get_bar_info.pci_device.domain = 0;
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get_bar_info.pci_device.bus = p->pci_device.bus;
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get_bar_info.pci_device.device = p->pci_device.device;
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get_bar_info.pci_device.function = p->pci_device.function;
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get_bar_info.bar_index = p->bar_index;
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retval = esc_mods_pci_get_bar_info_2(pfile, &get_bar_info);
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if (retval)
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return retval;
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p->base_address = get_bar_info.base_address;
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p->bar_size = get_bar_info.bar_size;
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return OK;
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}
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int esc_mods_pci_get_irq_2(struct file *pfile,
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struct MODS_PCI_GET_IRQ_2 *p)
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{
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struct pci_dev *dev;
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unsigned int devfn;
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devfn = PCI_DEVFN(p->pci_device.device, p->pci_device.function);
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dev = MODS_PCI_GET_SLOT(p->pci_device.domain, p->pci_device.bus, devfn);
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if (dev == NULL)
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return -EINVAL;
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mods_debug_printk(DEBUG_PCI,
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"pci get irq %04x:%x:%02x:%x\n",
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(int) p->pci_device.domain,
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(int) p->pci_device.bus, (int) p->pci_device.device,
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(int) p->pci_device.function);
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p->irq = dev->irq;
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return OK;
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}
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int esc_mods_pci_get_irq(struct file *pfile,
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struct MODS_PCI_GET_IRQ *p)
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{
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int retval;
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struct MODS_PCI_GET_IRQ_2 get_irq = { {0} };
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get_irq.pci_device.domain = 0;
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get_irq.pci_device.bus = p->pci_device.bus;
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get_irq.pci_device.device = p->pci_device.device;
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get_irq.pci_device.function = p->pci_device.function;
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retval = esc_mods_pci_get_irq_2(pfile, &get_irq);
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if (retval)
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return retval;
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p->irq = get_irq.irq;
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return OK;
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}
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int esc_mods_pci_read_2(struct file *pfile, struct MODS_PCI_READ_2 *p)
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{
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struct pci_dev *dev;
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unsigned int devfn;
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devfn = PCI_DEVFN(p->pci_device.device, p->pci_device.function);
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dev = MODS_PCI_GET_SLOT(p->pci_device.domain, p->pci_device.bus, devfn);
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if (dev == NULL)
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return -EINVAL;
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mods_debug_printk(DEBUG_PCI,
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"pci read %04x:%x:%02x.%x, addr 0x%04x, size %d\n",
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(int) p->pci_device.domain,
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(int) p->pci_device.bus, (int) p->pci_device.device,
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(int) p->pci_device.function, (int) p->address,
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(int) p->data_size);
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p->data = 0;
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switch (p->data_size) {
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case 1: {
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u8 value;
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pci_read_config_byte(dev, p->address, &value);
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p->data = value;
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}
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break;
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case 2: {
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u16 value;
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pci_read_config_word(dev, p->address, &value);
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p->data = value;
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}
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break;
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case 4:
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pci_read_config_dword(dev, p->address, (u32 *) &p->data);
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break;
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default:
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return -EINVAL;
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}
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return OK;
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}
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int esc_mods_pci_read(struct file *pfile, struct MODS_PCI_READ *p)
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{
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int retval;
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struct MODS_PCI_READ_2 pci_read = { {0} };
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pci_read.pci_device.domain = 0;
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pci_read.pci_device.bus = p->bus_number;
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pci_read.pci_device.device = p->device_number;
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pci_read.pci_device.function = p->function_number;
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pci_read.address = p->address;
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pci_read.data_size = p->data_size;
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retval = esc_mods_pci_read_2(pfile, &pci_read);
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if (retval)
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return retval;
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p->data = pci_read.data;
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return OK;
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}
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int esc_mods_pci_write_2(struct file *pfile, struct MODS_PCI_WRITE_2 *p)
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{
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struct pci_dev *dev;
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unsigned int devfn;
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mods_debug_printk(DEBUG_PCI,
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"pci write %04x:%x:%02x.%x, addr 0x%04x, size %d, data 0x%x\n",
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(int) p->pci_device.domain,
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(int) p->pci_device.bus, (int) p->pci_device.device,
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(int) p->pci_device.function,
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(int) p->address, (int) p->data_size, (int) p->data);
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devfn = PCI_DEVFN(p->pci_device.device, p->pci_device.function);
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dev = MODS_PCI_GET_SLOT(p->pci_device.domain, p->pci_device.bus, devfn);
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if (dev == NULL) {
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mods_error_printk(
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"pci write to %04x:%x:%02x.%x, addr 0x%04x, size %d failed\n",
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(unsigned int)p->pci_device.domain,
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(unsigned int)p->pci_device.bus,
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(unsigned int)p->pci_device.device,
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(unsigned int)p->pci_device.function,
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(unsigned int)p->address,
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(int)p->data_size);
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return -EINVAL;
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}
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switch (p->data_size) {
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case 1:
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pci_write_config_byte(dev, p->address, p->data);
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|
|
break;
|
||
|
|
case 2:
|
||
|
|
pci_write_config_word(dev, p->address, p->data);
|
||
|
|
break;
|
||
|
|
case 4:
|
||
|
|
pci_write_config_dword(dev, p->address, p->data);
|
||
|
|
break;
|
||
|
|
default:
|
||
|
|
return -EINVAL;
|
||
|
|
}
|
||
|
|
return OK;
|
||
|
|
}
|
||
|
|
|
||
|
|
int esc_mods_pci_write(struct file *pfile,
|
||
|
|
struct MODS_PCI_WRITE *p)
|
||
|
|
{
|
||
|
|
struct MODS_PCI_WRITE_2 pci_write = { {0} };
|
||
|
|
|
||
|
|
pci_write.pci_device.domain = 0;
|
||
|
|
pci_write.pci_device.bus = p->bus_number;
|
||
|
|
pci_write.pci_device.device = p->device_number;
|
||
|
|
pci_write.pci_device.function = p->function_number;
|
||
|
|
pci_write.address = p->address;
|
||
|
|
pci_write.data = p->data;
|
||
|
|
pci_write.data_size = p->data_size;
|
||
|
|
|
||
|
|
return esc_mods_pci_write_2(pfile, &pci_write);
|
||
|
|
}
|
||
|
|
|
||
|
|
int esc_mods_pci_bus_add_dev(struct file *pfile,
|
||
|
|
struct MODS_PCI_BUS_ADD_DEVICES *scan)
|
||
|
|
{
|
||
|
|
#if defined(CONFIG_PCI)
|
||
|
|
mods_info_printk("scanning pci bus %x\n", scan->bus);
|
||
|
|
|
||
|
|
/* initiate a PCI bus scan to find hotplugged PCI devices in domain 0 */
|
||
|
|
pci_scan_child_bus(pci_find_bus(0, scan->bus));
|
||
|
|
|
||
|
|
/* add newly found devices */
|
||
|
|
pci_bus_add_devices(pci_find_bus(0, scan->bus));
|
||
|
|
|
||
|
|
return OK;
|
||
|
|
#else
|
||
|
|
return -EINVAL;
|
||
|
|
#endif
|
||
|
|
}
|
||
|
|
|
||
|
|
int esc_mods_pci_hot_reset(struct file *pfile,
|
||
|
|
struct MODS_PCI_HOT_RESET *p)
|
||
|
|
{
|
||
|
|
#if defined(CONFIG_PPC64)
|
||
|
|
struct pci_dev *dev;
|
||
|
|
unsigned int devfn;
|
||
|
|
int retval;
|
||
|
|
|
||
|
|
mods_debug_printk(DEBUG_PCI,
|
||
|
|
"pci_hot_reset %04x:%x:%02x.%x\n",
|
||
|
|
(int) p->pci_device.domain,
|
||
|
|
(int) p->pci_device.bus,
|
||
|
|
(int) p->pci_device.device,
|
||
|
|
(int) p->pci_device.function);
|
||
|
|
|
||
|
|
devfn = PCI_DEVFN(p->pci_device.device, p->pci_device.function);
|
||
|
|
dev = MODS_PCI_GET_SLOT(p->pci_device.domain, p->pci_device.bus, devfn);
|
||
|
|
|
||
|
|
if (dev == NULL) {
|
||
|
|
mods_error_printk(
|
||
|
|
"pci_hot_reset cannot find pci device %04x:%x:%02x.%x\n",
|
||
|
|
(unsigned int)p->pci_device.domain,
|
||
|
|
(unsigned int)p->pci_device.bus,
|
||
|
|
(unsigned int)p->pci_device.device,
|
||
|
|
(unsigned int)p->pci_device.function);
|
||
|
|
return -EINVAL;
|
||
|
|
}
|
||
|
|
|
||
|
|
retval = pci_set_pcie_reset_state(dev, pcie_hot_reset);
|
||
|
|
if (retval) {
|
||
|
|
mods_error_printk(
|
||
|
|
"pci_hot_reset failed on %04x:%x:%02x.%x\n",
|
||
|
|
(unsigned int)p->pci_device.domain,
|
||
|
|
(unsigned int)p->pci_device.bus,
|
||
|
|
(unsigned int)p->pci_device.device,
|
||
|
|
(unsigned int)p->pci_device.function);
|
||
|
|
return retval;
|
||
|
|
}
|
||
|
|
|
||
|
|
retval = pci_set_pcie_reset_state(dev, pcie_deassert_reset);
|
||
|
|
if (retval) {
|
||
|
|
mods_error_printk(
|
||
|
|
"pci_hot_reset deassert failed on %04x:%x:%02x.%x\n",
|
||
|
|
(unsigned int)p->pci_device.domain,
|
||
|
|
(unsigned int)p->pci_device.bus,
|
||
|
|
(unsigned int)p->pci_device.device,
|
||
|
|
(unsigned int)p->pci_device.function);
|
||
|
|
return retval;
|
||
|
|
}
|
||
|
|
|
||
|
|
return OK;
|
||
|
|
#else
|
||
|
|
return -EINVAL;
|
||
|
|
#endif
|
||
|
|
}
|
||
|
|
|
||
|
|
/************************
|
||
|
|
* PIO ESCAPE FUNCTIONS *
|
||
|
|
************************/
|
||
|
|
|
||
|
|
int esc_mods_pio_read(struct file *pfile, struct MODS_PIO_READ *p)
|
||
|
|
{
|
||
|
|
LOG_ENT();
|
||
|
|
switch (p->data_size) {
|
||
|
|
case 1:
|
||
|
|
p->data = inb(p->port);
|
||
|
|
break;
|
||
|
|
case 2:
|
||
|
|
p->data = inw(p->port);
|
||
|
|
break;
|
||
|
|
case 4:
|
||
|
|
p->data = inl(p->port);
|
||
|
|
break;
|
||
|
|
default:
|
||
|
|
return -EINVAL;
|
||
|
|
}
|
||
|
|
LOG_EXT();
|
||
|
|
return OK;
|
||
|
|
}
|
||
|
|
|
||
|
|
int esc_mods_pio_write(struct file *pfile, struct MODS_PIO_WRITE *p)
|
||
|
|
{
|
||
|
|
LOG_ENT();
|
||
|
|
switch (p->data_size) {
|
||
|
|
case 1:
|
||
|
|
outb(p->data, p->port);
|
||
|
|
break;
|
||
|
|
case 2:
|
||
|
|
outw(p->data, p->port);
|
||
|
|
break;
|
||
|
|
case 4:
|
||
|
|
outl(p->data, p->port);
|
||
|
|
break;
|
||
|
|
default:
|
||
|
|
return -EINVAL;
|
||
|
|
}
|
||
|
|
LOG_EXT();
|
||
|
|
return OK;
|
||
|
|
}
|
||
|
|
|
||
|
|
int esc_mods_device_numa_info_2(struct file *fp,
|
||
|
|
struct MODS_DEVICE_NUMA_INFO_2 *p)
|
||
|
|
{
|
||
|
|
#ifdef MODS_HAS_DEV_TO_NUMA_NODE
|
||
|
|
unsigned int devfn = PCI_DEVFN(p->pci_device.device,
|
||
|
|
p->pci_device.function);
|
||
|
|
struct pci_dev *dev = MODS_PCI_GET_SLOT(p->pci_device.domain,
|
||
|
|
p->pci_device.bus, devfn);
|
||
|
|
|
||
|
|
LOG_ENT();
|
||
|
|
|
||
|
|
if (dev == NULL) {
|
||
|
|
mods_error_printk("PCI device %04x:%x:%02x.%x not found\n",
|
||
|
|
p->pci_device.domain,
|
||
|
|
p->pci_device.bus, p->pci_device.device,
|
||
|
|
p->pci_device.function);
|
||
|
|
LOG_EXT();
|
||
|
|
return -EINVAL;
|
||
|
|
}
|
||
|
|
|
||
|
|
p->node = dev_to_node(&dev->dev);
|
||
|
|
if (-1 != p->node) {
|
||
|
|
const unsigned long *maskp
|
||
|
|
= cpumask_bits(cpumask_of_node(p->node));
|
||
|
|
unsigned int i, word, bit, maskidx;
|
||
|
|
|
||
|
|
if (((nr_cpumask_bits + 31) / 32) > MAX_CPU_MASKS) {
|
||
|
|
mods_error_printk("too many CPUs (%d) for mask bits\n",
|
||
|
|
nr_cpumask_bits);
|
||
|
|
LOG_EXT();
|
||
|
|
return -EINVAL;
|
||
|
|
}
|
||
|
|
|
||
|
|
for (i = 0, maskidx = 0;
|
||
|
|
i < nr_cpumask_bits;
|
||
|
|
i += 32, maskidx++) {
|
||
|
|
word = i / BITS_PER_LONG;
|
||
|
|
bit = i % BITS_PER_LONG;
|
||
|
|
p->node_cpu_mask[maskidx]
|
||
|
|
= (maskp[word] >> bit) & 0xFFFFFFFFUL;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
p->node_count = num_possible_nodes();
|
||
|
|
p->cpu_count = num_possible_cpus();
|
||
|
|
|
||
|
|
LOG_EXT();
|
||
|
|
return OK;
|
||
|
|
#else
|
||
|
|
return -EINVAL;
|
||
|
|
#endif
|
||
|
|
}
|
||
|
|
|
||
|
|
int esc_mods_device_numa_info(struct file *fp,
|
||
|
|
struct MODS_DEVICE_NUMA_INFO *p)
|
||
|
|
{
|
||
|
|
int retval, i;
|
||
|
|
struct MODS_DEVICE_NUMA_INFO_2 numa_info = { {0} };
|
||
|
|
|
||
|
|
numa_info.pci_device.domain = 0;
|
||
|
|
numa_info.pci_device.bus = p->pci_device.bus;
|
||
|
|
numa_info.pci_device.device = p->pci_device.device;
|
||
|
|
numa_info.pci_device.function = p->pci_device.function;
|
||
|
|
|
||
|
|
retval = esc_mods_device_numa_info_2(fp, &numa_info);
|
||
|
|
if (retval)
|
||
|
|
return retval;
|
||
|
|
|
||
|
|
p->node = numa_info.node;
|
||
|
|
p->node_count = numa_info.node_count;
|
||
|
|
for (i = 0; i < MAX_CPU_MASKS; i++)
|
||
|
|
p->node_cpu_mask[i] = numa_info.node_cpu_mask[i];
|
||
|
|
p->cpu_count = numa_info.cpu_count;
|
||
|
|
return OK;
|
||
|
|
}
|
||
|
|
|
||
|
|
int esc_mods_get_iommu_state(struct file *pfile,
|
||
|
|
struct MODS_GET_IOMMU_STATE *state)
|
||
|
|
{
|
||
|
|
int err = esc_mods_get_iommu_state_2(pfile, state);
|
||
|
|
|
||
|
|
if (!err)
|
||
|
|
state->state = (state->state == MODS_SWIOTLB_DISABLED) ? 1 : 0;
|
||
|
|
|
||
|
|
return err;
|
||
|
|
}
|
||
|
|
|
||
|
|
int esc_mods_get_iommu_state_2(struct file *pfile,
|
||
|
|
struct MODS_GET_IOMMU_STATE *state)
|
||
|
|
{
|
||
|
|
#if !defined(CONFIG_SWIOTLB)
|
||
|
|
state->state = MODS_SWIOTLB_DISABLED;
|
||
|
|
#elif defined(MODS_HAS_DMA_OPS) && \
|
||
|
|
(defined(MODS_HAS_NONCOH_DMA_OPS) || defined(MODS_HAS_MAP_SG_ATTRS))
|
||
|
|
|
||
|
|
unsigned int devfn = PCI_DEVFN(state->pci_device.device,
|
||
|
|
state->pci_device.function);
|
||
|
|
struct pci_dev *dev = MODS_PCI_GET_SLOT(state->pci_device.domain,
|
||
|
|
state->pci_device.bus,
|
||
|
|
devfn);
|
||
|
|
|
||
|
|
const struct dma_map_ops *ops = get_dma_ops(&dev->dev);
|
||
|
|
|
||
|
|
#if defined(MODS_HAS_NONCOH_DMA_OPS)
|
||
|
|
state->state = (ops != &noncoherent_swiotlb_dma_ops &&
|
||
|
|
ops != &coherent_swiotlb_dma_ops)
|
||
|
|
? MODS_SWIOTLB_DISABLED : MODS_SWIOTLB_ACTIVE;
|
||
|
|
#else
|
||
|
|
state->state = ops->map_sg != swiotlb_map_sg_attrs
|
||
|
|
? MODS_SWIOTLB_DISABLED : MODS_SWIOTLB_ACTIVE;
|
||
|
|
#endif
|
||
|
|
#elif defined(CONFIG_PPC64) || defined(CONFIG_ARM64)
|
||
|
|
/* No way to detect, assume SW I/O TLB is disabled on ppc64/arm64 */
|
||
|
|
state->state = MODS_SWIOTLB_DISABLED;
|
||
|
|
#else
|
||
|
|
/* No way to detect on old kernel */
|
||
|
|
state->state = MODS_SWIOTLB_INDETERMINATE;
|
||
|
|
#endif
|
||
|
|
return OK;
|
||
|
|
}
|
||
|
|
|
||
|
|
int esc_mods_pci_set_dma_mask(struct file *file,
|
||
|
|
struct MODS_PCI_DMA_MASK *dma_mask)
|
||
|
|
{
|
||
|
|
int err;
|
||
|
|
unsigned int devfn = PCI_DEVFN(dma_mask->pci_device.device,
|
||
|
|
dma_mask->pci_device.function);
|
||
|
|
struct pci_dev *dev = MODS_PCI_GET_SLOT(dma_mask->pci_device.domain,
|
||
|
|
dma_mask->pci_device.bus,
|
||
|
|
devfn);
|
||
|
|
u64 mask;
|
||
|
|
|
||
|
|
if (dma_mask->num_bits > 64)
|
||
|
|
return -EINVAL;
|
||
|
|
mask = dma_mask->num_bits == 64 ? ~0ULL : (1ULL<<dma_mask->num_bits)-1;
|
||
|
|
|
||
|
|
err = pci_set_dma_mask(dev, mask);
|
||
|
|
if (err) {
|
||
|
|
mods_error_printk("failed to set dma mask 0x%llx for dev %04x:%x:%02x.%x\n",
|
||
|
|
mask,
|
||
|
|
(unsigned int)dma_mask->pci_device.domain,
|
||
|
|
(unsigned int)dma_mask->pci_device.bus,
|
||
|
|
(unsigned int)dma_mask->pci_device.device,
|
||
|
|
(unsigned int)dma_mask->pci_device.function);
|
||
|
|
#if defined(CONFIG_PPC64)
|
||
|
|
/* Ignore error if TCE bypass is on */
|
||
|
|
if (dev->dma_mask == ~0ULL)
|
||
|
|
err = OK;
|
||
|
|
#endif
|
||
|
|
} else
|
||
|
|
err = pci_set_consistent_dma_mask(dev, mask);
|
||
|
|
|
||
|
|
return err;
|
||
|
|
}
|