275 lines
7.8 KiB
Plaintext
275 lines
7.8 KiB
Plaintext
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config DENVER_CPU
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bool "Denver CPU"
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help
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Support for NVIDIA Denver CPU
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config DENVER_MCA
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tristate "Denver Machine Check Handler"
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depends on DENVER_CPU
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select SERROR_HANDLER
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help
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The Denver Machine Check handler. It collects and reports errors from
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the Denver CPUs.
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config TEGRA_AON
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bool "Tegra AON driver"
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depends on ARCH_TEGRA_18x_SOC
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select NV_TEGRA_IVC
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select TEGRA_HSP
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config TEGRA_ARI_MCA
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tristate "Tegra Abstract Request Interface (ARI) Machine Check"
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select SERROR_HANDLER
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help
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The Tegra Abstract Request Interface (ARI) Machine Check handler. This
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handles the Machine Check registers that are accessible via ARI.
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config TEGRA_BRIDGE_MCA
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tristate "AXI/APB Bridge Machine Check"
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select SERROR_HANDLER
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help
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The Tegra AXI/APB Bridge Machine Check handler. This
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handes the SERRs from failed AXI/APB transactions.
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config TEGRA_A57_SERR
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tristate "A57 SError Handler"
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select SERROR_HANDLER
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help
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The A57 SError Handler. This handles the SERRs from A57 cores,
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specifically L1 ECC errors.
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config TEGRA_18X_SERROR
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tristate "Tegra18 SError handler"
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depends on ARCH_TEGRA_18x_SOC
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select DENVER_MCA
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select TEGRA_ARI_MCA
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select TEGRA_BRIDGE_MCA
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select TEGRA_A57_SERR
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help
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The Tegra18 SError handler. This handles Denver SErrors, A57 SErrors,
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CCPLEX errors, and fabric slave errors.
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config TEGRA_BWMGR
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bool "Enable EMC Bandwidth Manager"
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depends on COMMON_CLK
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default n
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help
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Enables Bandwidth manager support for EMC clock. Required when using Common Clock Framework
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config TEGRA_CAMERA_RTCPU
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bool "Enable Tegra Camera RTCPU Driver"
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depends on ARCH_TEGRA_18x_SOC
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select NV_TEGRA_IVC
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select TEGRA_HSP
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config TEGRA_ISOMGR
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bool "Isochronous Bandwidth Manager "
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help
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When enabled, drivers for ISO units can obtain ISO BW.
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The memory controller (MC) for each Tegra platform can supply
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a limited amount of isochronous (real-time) bandwidth. When
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enabled, isomgr will manage a pool of ISO BW.
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config TEGRA_ISOMGR_POOL_KB_PER_SEC
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int "Size of isomgr pool "
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default 0
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help
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Set this maximum ISO BW (in Kbytes/sec) that platform supports.
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The memory controller (MC) for each Tegra platform can supply
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a limited amount of isochronous (real-time) bandwidth. Each
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platform must specify the maximum amount of ISO BW that isomgr
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should manage.
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config TEGRA_ISOMGR_SYSFS
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bool "Visibility into Isochronous Bandwidth Manager state "
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depends on TEGRA_ISOMGR
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help
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When enabled, sysfs can be used to query isomgr state.
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This is used for visibility into isomgr state. It could
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be useful in debug or in understanding performance on a
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running system.
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config TEGRA_ISOMGR_MAX_ISO_BW_QUIRK
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bool "Relax Max ISO Bw limit"
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depends on TEGRA_ISOMGR
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default n
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help
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When enabled, allows system with less ISO bw continue to
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work. This is necessary for systems running at lower
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EMC clock freq or on FPGA.
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config TEGRA_MC
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bool "Tegra MC"
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default y
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help
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Enable Tegra MC.
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config TEGRA_MC_TRACE_PRINTK
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bool "Enable trace_printk debugging for MC"
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depends on FTRACE_PRINTK
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config TEGRA_OF_MCERR
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bool "Tegra MCERR OF"
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default y
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help
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Enable Tegra MC ERR OF.
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config TEGRA_PM_IRQ
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bool "Enable PM IRQ"
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default y if ARCH_TEGRA_18x_SOC || ARCH_TEGRA_19x_SOC
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config TEGRA_PMC_AO_WAKE
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bool "Enable AO WAKE from PMC"
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default y if ARCH_TEGRA_18x_SOC || ARCH_TEGRA_19x_SOC
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config TEGRA_WAKEUP
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bool "Enable WAKEUP"
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default y if ARCH_TEGRA_18x_SOC || ARCH_TEGRA_19x_SOC
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config TEGRA_PTP_NOTIFIER
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tristate "Enable PTP Notifier"
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depends on ARCH_TEGRA_18x_SOC
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default y if EQOS
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config TEGRA_SAFETY_SCE
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tristate "Enable CCPLEX-SCE communication Driver for Safety"
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depends on ARCH_TEGRA_18x_SOC
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select NV_TEGRA_IVC
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select TEGRA_HSP
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help
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This enables communication between CCPLEX and SCE over IVC channel.
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This also provides a userspace command response interface as
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character device which will be used by other safety modules.
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config TEGRA_19X_RAS
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tristate "Tegra19 RAS Handler"
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depends on ARCH_TEGRA_19x_SOC && RAS && ARM64_RAS
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default y
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select SERROR_HANDLER
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help
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This driver adds RAS handlers for Carmel Correctable Errors,
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Uncorrectable Errors per core, per core cluster and per CCPLEX
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config TEGRA_CBB_NOC
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tristate "Tegar19x CBB NOC Bridge Error handler"
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depends on ARCH_TEGRA_19x_SOC
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default y
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select SERROR_HANDLER
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help
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The Tegra Control Backbone(CBB)/Network-on-chip(NOC) error handler.
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This drivers handles SError from bridges due to failed transactions.
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config POWERGATE_TEGRA_BPMP
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def_bool NV_TEGRA_BPMP
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config TEGRA_HV_XHCI_DEBUG
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bool "Enable Tegra Hypervisor XHCI Server Debug"
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depends on TEGRA_HV_MANAGER
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default n
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help
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Enable Tegra XHCI Server debugging when runs in virtualization.
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config TEGRA_HSP
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bool "Enable Tegra Hardware Synchronization Primitives driver"
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default y
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config TEGRA_NVDUMPER
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bool "Enable nvdumper"
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depends on ARCH_TEGRA
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default n
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help
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This is debug feature to dump whole memory when system crashes.
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config TEGRA_CENTRAL_ACTMON
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bool "Tegra Activity Monitor"
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depends on ARCH_TEGRA
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default n
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help
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Actmon is a hardware block that can be used to track the activity of
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certain hardware units. It can boost EMC clock depending
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on the memory trafic among various client. It is called central actmon
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as it monitors central activity for example MC activity. HW fabric of
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central and unit actmon is different. If unsure, say Y here.
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config TEGRA_FIRMWARES_CLASS
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bool
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default n
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config TEGRA_FIRMWARES_INVENTORY
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tristate "Tegra firmwares inventory"
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select TEGRA_FIRMWARES_CLASS
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default y
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help
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Register version readers for firmwares
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config TEGRA_FIQ_DEBUGGER
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bool "Enable the FIQ serial debugger on Tegra"
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default n
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select FIQ_DEBUGGER
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select FIQ_GLUE
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help
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Enables the FIQ serial debugger on Tegra
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config TEGRA_BOOTLOADER_DEBUG
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tristate "Creates sys-fs interface dumping registers read by bootloader"
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default n
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select TEGRA_BOOTLOADER_DEBUG_INIT
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help
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When enabled, tegra_bootloader_verify_regs sys-fs is created.
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config TEGRA_BOOTLOADER_DEBUG_INIT
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bool
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depends on TEGRA_BOOTLOADER_DEBUG
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config TEGRA_BOOTLOADER_BOOT_CFG
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tristate "Creates sysfs interface for BCP data"
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depends on TEGRA_BOOTLOADER_DEBUG_INIT
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default n
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help
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When enabled, boot_cfg sys-fs is created.
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config NV_TEGRA_IVC
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bool "Tegra IVC protocol support (Downstream version)"
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default n
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help
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Enable the Tegra IVC library, which implements a lockless, shared-
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memory queue.
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config TEGRA_CPU_TOPOLOGY_DEBUGFS
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bool "Tegra CPU topology in debugfs"
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depends on ARCH_TEGRA_18x_SOC
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default n
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help
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When enabled, make symbolic links to cpux (sysfs nodes) inside directories
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in debugfs, build as per cpu type available for classifiying the cpus.
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config TEGRA_CPU_TOPOLOGY_SYSFS
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tristate "Tegra CPU topology in sysfs"
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depends on ARCH_TEGRA_18x_SOC
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default m
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help
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When enabled, make symbolic links to cpux (sysfs nodes) inside directories
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in sysfs, build as per cpu type available for classifiying the cpus.
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config TEGRA_CLOCKS_CONFIGURE
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bool "Configure initial state of clocks"
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default y if ARCH_TEGRA_18x_SOC || ARCH_TEGRA_19x_SOC
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help
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Enable or disable clocks during kernel initialization.
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This helps in optimizing power by disabling some always on clocks.
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config TEGRA_SAFETY
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tristate "Tegra safety ivc driver"
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default n
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help
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When enabled, establish the IVC channel with SCE FW and support ivc
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frame transfers.
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config TEGRA_SAFETY_IVC_DEBUG
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tristate "Use ivc stubs for safety ivc driver testing"
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depends on TEGRA_SAFETY
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help
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When enabled, stub the IVC responses from SCE FW.
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source "drivers/platform/tegra/nvadsp/Kconfig"
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