130 lines
4.2 KiB
C
130 lines
4.2 KiB
C
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/*
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* hdmivrr.h: hdmi vrr headers declarations.
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*
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* Copyright (c) 2015-2018, NVIDIA CORPORATION, All rights reserved.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef __DRIVERS_VIDEO_TEGRA_DC_HDMIVRR_H
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#define __DRIVERS_VIDEO_TEGRA_DC_HDMIVRR_H
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#define VCP_NV_DISP_CONTROLLER_ID 0xc8
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#define NV_MODULE_REV(controller_id) ((controller_id) >> 8)
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#define NV_MODULE_ID(controller_id) ((controller_id) >> 12)
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#define NV_MODULE_ID_R2 (0 << 0)
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#define NV_MODULE_ID_R3 (1 << 0)
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#define NV_MODULE_ID_R4 (2 << 0)
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#define VCP_MAGIC0 0xe0
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#define VCP_MAGIC1 0xe1
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#define VCP_AUX_STAT 0xe2
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#define VCP_AUX_STAT_IDLE 0x00
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#define VCP_AUX_STAT_RD 0x01
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#define VCP_AUX_STAT_WR 0x02
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#define VCP_AUX_ADDR_H 0xe3
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#define VCP_AUX_ADDR_L 0xe4
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#define VCP_AUX_LENGTH 0xe5
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#define VCP_AUX_BUF 0xe6
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#define VCP_TEMP 0xf9
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#define VCP_BOARDID 0xfa
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#define VCP_DP_STATUS 0xfb
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#define VCP_GFX_VER 0xfc
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#define VCP_PANEL_VER 0xfd
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#define VCP_NV_FW_VER 0xfe
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#define NV_FW_MIN_VER 0x400
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#define VCP_ERROR 0xff
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#define SET_VCP_LEN 0x7
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#define SET_VCP_VCP_OFF 0x3
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#define SET_VCP_SH_OFF 0x4
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#define SET_VCP_SL_OFF 0x5
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#define GET_VCP_WR_LEN 0x5
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#define GET_VCP_WR_VCP_OFF 0x3
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#define GET_VCP_RD_LEN 0xb
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#define GET_VCP_RES_CODE_OFF 0x3
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#define GET_VCP_RES_CODE_NO_ERR 0x0
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#define GET_VCP_RES_CODE_UN_SUP 0x1
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#define GET_VCP_SH_OFF 0x8
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#define GET_VCP_SL_OFF 0x9
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#define TABLE_WRITE_LEN 0x17
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#define TABLE_WRITE_HEADER_LEN 0x6
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#define TABLE_WRITE_LEN_OFF 0x1
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#define TABLE_WRITE_VCP_OFF 0x3
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#define TABLE_WRITE_DATA_OFF 0x6
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#define TABLE_READ_WR_LEN 0x7
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#define TABLE_READ_WR_VCP_OFF 0x3
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#define TABLE_READ_RD_LEN 0x16
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#define TABLE_READ_RD_HEADER_LEN 0x5
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#define TABLE_READ_RD_DATA_OFF 0x5
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#define DPAUX_SOURCE_OUI 0x300
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#define DPAUX_AUTH_MAGIC 0x310
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#define AUTH_MAGIC_NUM 0x56525200
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#define DPAUX_AUTH_PROTOCOL 0x314
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#define AUTH_PROTOCOL_VALID 0x1
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#define DPAUX_AUTH_KEYNUM 0x315
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#define AUTH_KEYNUM_VALUE 0x09
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#define DPAUX_SERIALNUM 0x316
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#define DPAUX_AUTH_CMD 0x320
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#define AUTH_CMD_RESET 0x0
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#define AUTH_CMD_MONAUTH 0x1
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#define AUTH_CMD_DRVAUTH 0x2
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#define DPAUX_AUTH_STATUS 0x321
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#define AUTH_STATUS_READY 0xff
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#define AUTH_STATUS_BUSY 0x01
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#define DPAUX_LOCK_STATUS 0x322
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#define LOCK_STATUS_LOCKED 0x00
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#define LOCK_STATUS_UNLOCKED 0x01
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#define DPAUX_AUTH_CHALLENGE1 0x3c0
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#define DPAUX_AUTH_CHALLENGE2 0x3d0
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#define DPAUX_AUTH_DIGEST1 0x3e0
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#define DPAUX_AUTH_DIGEST2 0x3f0
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#define CMD_VRR_SEC 101
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#define CMD_VRR_AUTH 102
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#if defined(CONFIG_TRUSTED_LITTLE_KERNEL)
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extern int te_open_trusted_session_tlk(u32 *ta_uuid, u32 size, u32 *session_id);
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extern int te_launch_trusted_oper_tlk(u64 *buf, u32 buflen, u32 session_id,
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u32 *ta_uuid, u32 comd_id, u32 size);
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extern void te_close_trusted_session_tlk(u32 session_id, u32 *ta_uuid,
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u32 size);
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#endif
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#ifdef CONFIG_TEGRA_HDMIVRR
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int tegra_hdmivrr_setup(struct tegra_hdmi *hdmi);
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int tegra_hdmivrr_disable(struct tegra_hdmi *hdmi);
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void tegra_hdmivrr_update_monspecs(struct tegra_dc *dc,
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struct list_head *head);
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int tegra_hdmi_vrr_init(struct tegra_hdmi *hdmi);
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int tegra_hdmivrr_te_set_buf(void *addr);
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void _tegra_hdmivrr_activate(struct tegra_hdmi *hdmi, bool activate);
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#else
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static inline int tegra_hdmivrr_setup(struct tegra_hdmi *hdmi) { return 0; }
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static inline int tegra_hdmivrr_disable(struct tegra_hdmi *hdmi) { return 0; }
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static inline void tegra_hdmivrr_update_monspecs(struct tegra_dc *dc,
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struct list_head *head)
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{ return; }
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static inline int tegra_hdmi_vrr_init(struct tegra_hdmi *hdmi) { return 0; }
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static inline int tegra_hdmivrr_te_set_buf(void *addr)
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{ return -EPROTONOSUPPORT; }
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static inline void _tegra_hdmivrr_activate(struct tegra_hdmi *hdmi,
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bool activate)
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{ return; }
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#endif
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#endif
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