103 lines
3.0 KiB
C
103 lines
3.0 KiB
C
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/*
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* Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _PVA_UCODE_HEADER_H_
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#define _PVA_UCODE_HEADER_H_
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#include "pva-ucode-header-types.h"
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#define MAX_SEGMENT_NAME_LEN 64
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/*
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* PVA uCode Header.
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*
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* There is a basic header that describes the uCode. Other than the
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* validation information (such as versions, checksums (MD5 hash?), etc)
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* it describes the various segments of the uCode image. The important
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* thing to note is that there are multiple segments for various parts of
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* the uCode.
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*
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* Each segment has:
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* - type: this indicates the type of segment it is.
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* - id: this gives a uniqueness to the segment when there are multiple
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* segments of the same type. It also allows different segments types
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* to be related by using the same segment ID (such as relating VPU code,
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* R5 application code and parameter data together).
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* - name: this is NUL terminated string that is the "name" of the segment
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* - size: size of the segment in bytes
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* - offset: this is the offset from the start of the binary as to
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* where the data contained in the segment is to be placed.
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* - address: this is the address of where the data in the segment is
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* to be written to.
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* - physical address: this is used in some segments to denote where in
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* the 40-bit address space the segment is located. This allows for
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* setting up some of the segment registers.
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*
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* A segment can define a region but contain no data. In those cases, the
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* file offset would be 0.
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*
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* In the case of DRAM the load address and size can be used to setup the
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* relevant segment registers and DRAM apertures.
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*
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*/
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/*
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* There can be multiple segments of the same type.
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*/
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/**
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* pva_ucode_seg - uCode segment struct
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*
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* @type: Type of segment
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* @id: ID of segment
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* @size: Size of the segment
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* @offset: Offset from header to segment start
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* @addr: Load address of segment
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* @name: Name of segment
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* @phys_addr: Physical addr of the segment
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*
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*/
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struct pva_ucode_seg {
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uint32_t type;
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uint32_t id;
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uint32_t size;
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uint32_t offset;
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uint32_t addr;
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uint8_t name[MAX_SEGMENT_NAME_LEN];
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uint64_t phys_addr __attribute__((aligned(sizeof(uint64_t))));
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};
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/**
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* pva_ucode_hdr - uCode header struct
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*
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* @magic: Module Magic number
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* @hdr_version: Header version
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* @ucode_version: Firmware version
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* @nsegments: Number of segments
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*
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*/
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struct pva_ucode_hdr {
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uint32_t magic;
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uint32_t hdr_version;
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uint32_t ucode_version;
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uint32_t nsegments;
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};
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#endif
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