361 lines
8.9 KiB
C
361 lines
8.9 KiB
C
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/*
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* drivers/video/tegra/host/pva/pva.h
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*
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* Tegra PVA header
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*
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* Copyright (c) 2016-2018, NVIDIA Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __NVHOST_PVA_H__
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#define __NVHOST_PVA_H__
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#include <linux/dma-attrs.h>
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#include <linux/mutex.h>
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#include <linux/version.h>
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#include "nvhost_queue.h"
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#include "pva_regs.h"
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extern const struct file_operations tegra_pva_ctrl_ops;
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enum pva_submit_mode {
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PVA_SUBMIT_MODE_MAILBOX = 0,
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PVA_SUBMIT_MODE_MMIO_CCQ = 1,
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PVA_SUBMIT_MODE_CHANNEL_CCQ = 2
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};
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struct pva_version_info {
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u32 pva_r5_version;
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u32 pva_compat_version;
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u32 pva_revision;
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u32 pva_built_on;
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};
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/**
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* Queue count of 8 is maintained per PVA.
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*/
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#define MAX_PVA_QUEUE_COUNT 8
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/**
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* Maximum task count that a queue can support
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*/
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#define MAX_PVA_TASK_COUNT 16
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/**
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* Minium PVA frequency (10MHz)
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*/
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#define MIN_PVA_FREQUENCY 10000000
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/**
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* @brief struct to hold the segment details
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*
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* addr: virtual addr of the segment from PRIV2 address base
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* size: segment size
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* offset: offset of the addr from priv2 base
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*
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*/
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struct pva_seg_info {
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void *addr;
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u32 size;
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u32 offset;
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};
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/**
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* @breif struct to hold the segment details for debug purpose
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*
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* pva Pointer to pva struct
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* seg_info pva_seg_info struct
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*
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*/
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struct pva_crashdump_debugfs_entry {
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struct pva *pva;
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struct pva_seg_info seg_info;
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};
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/**
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* @brief struct to handle dma alloc memory info
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*
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* size size allocated
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* phys_addr physical address
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* va virtual address
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*
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*/
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struct pva_dma_alloc_info {
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size_t size;
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dma_addr_t pa;
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void *va;
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};
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/**
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* @brief struct to handle the PVA firmware information
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*
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* hdr pointer to the pva_code_hdr struct
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* priv1_buffer pva_dma_alloc_info for priv1_buffer
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* priv2_buffer pva_dma_alloc_info for priv2_buffer
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* priv2_reg_offset priv2 register offset from uCode
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* attrs dma_attrs struct information
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* trace_buffer_size buffer size for trace log
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*
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*/
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struct pva_fw {
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struct pva_ucode_hdr *hdr;
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struct pva_dma_alloc_info priv1_buffer;
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struct pva_dma_alloc_info priv2_buffer;
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u32 priv2_reg_offset;
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#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 9, 0)
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struct dma_attrs attrs;
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#else
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unsigned long attrs;
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#endif
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u32 trace_buffer_size;
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};
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/*
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* @brief store trace log segment's address and size
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*
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* addr Pointer to the pva trace log segment
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* size Size of pva trace log segment
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* offset Offset in bytes for trace log segment
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*
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*/
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struct pva_trace_log {
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void *addr;
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u32 size;
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u32 offset;
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};
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/*
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* @brief stores address and other attributes of the vpu function table
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*
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* addr The pointer to start of the VPU function table
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* size Table size of the function table
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* handle The IOVA address of the function table
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* entries The total number of entries in the function table
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*
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*/
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struct pva_func_table {
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struct vpu_func *addr;
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uint32_t size;
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dma_addr_t handle;
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uint32_t entries;
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};
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/**
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* @brief Driver private data, shared with all applications
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*
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* pdev Pointer to the PVA device
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* pool Pointer to Queue table available for the PVA
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* fw_info firmware information struct
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* irq IRQ number obtained on registering the module
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* mailbox_mutex Mutex to avoid concurrent mailbox accesses
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* mailbox_waitq Mailbox waitqueue for response waiters
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* mailbox_status_regs Response is stored into this structure temporarily
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* mailbox_status Status of the mailbox interface
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* debugfs_entry_r5 debugfs segment information for r5
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* debugfs_entry_vpu0 debugfs segment information for vpu0
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* debugfs_entry_vpu1 debugfs segment information for vpu1
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* priv1_dma struct pva_dma_alloc_info for priv1_dma
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* priv2_dma struct pva_dma_alloc_info for priv2_dma
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* pva_trace struct for pva_trace_log
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* submit_mode Select the task submit mode
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* dbg_vpu_app_id Set the vpu_app id to debug
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* r5_dbg_wait Set the r5 debugger to wait
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* timeout_enabled Set pva timeout enabled based on debug
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* slcg_disable Second level Clock Gating control variable
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*
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*/
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struct pva {
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struct platform_device *pdev;
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struct nvhost_queue_pool *pool;
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struct pva_fw fw_info;
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int irq;
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wait_queue_head_t mailbox_waitqueue;
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struct pva_mailbox_status_regs mailbox_status_regs;
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enum pva_mailbox_status mailbox_status;
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struct mutex mailbox_mutex;
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struct mutex ccq_mutex;
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struct pva_crashdump_debugfs_entry debugfs_entry_r5;
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struct pva_crashdump_debugfs_entry debugfs_entry_vpu0;
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struct pva_crashdump_debugfs_entry debugfs_entry_vpu1;
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struct pva_dma_alloc_info priv1_dma;
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struct pva_dma_alloc_info priv2_dma;
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struct pva_trace_log pva_trace;
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u32 submit_mode;
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u32 dbg_vpu_app_id;
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u32 r5_dbg_wait;
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bool timeout_enabled;
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u32 slcg_disable;
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u32 vmem_war_disable;
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bool vpu_perf_counters_enable;
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struct work_struct pva_abort_handler_work;
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bool booted;
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u32 log_level;
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};
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/**
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* @brief Copy traces to kernel trace buffer.
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*
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* When mailbox interrupt for copying ucode trace buffer to
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* kernel-ucode shared trace buffer is arrived it copies the kernel-ucode
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* shared trace buffer to kernel ftrace buffer
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*
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* @pva Pointer to pva structure
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*
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*/
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void pva_trace_copy_to_ftrace(struct pva *pva);
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/**
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* @brief Finalize the PVA Power-on-Sequence.
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*
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* This function called from host subsystem driver after the PVA
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* partition has been brought up, clocks enabled and reset deasserted.
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* In production mode, the function needs to wait until the ready bit
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* within the PVA aperture has been set. After that enable the PVA IRQ.
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* Register the queue priorities on the PVA.
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*
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* @param pdev Pointer to PVA device
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* @return: 0 on Success or negative error code
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*
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*/
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int pva_finalize_poweron(struct platform_device *pdev);
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/**
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* @brief Prepare PVA poweroff.
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*
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* This function called from host subsystem driver before turning off
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* the PVA. The function should turn off the PVA IRQ.
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*
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* @param pdev Pointer to PVA device
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* @return 0 on Success or negative error code
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*
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*/
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int pva_prepare_poweroff(struct platform_device *pdev);
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/**
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* @brief Register PVA ISR.
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*
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* This function called from driver to register the
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* PVA ISR with IRQ.
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*
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* @param pdev Pointer to PVA device
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* @return 0 on Success or negative error code
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*
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*/
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int pva_register_isr(struct platform_device *dev);
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/**
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* @brief Initiallze pva debug utils
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*
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* @param pdev Pointer to PVA device
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* @return none
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*
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*/
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void pva_debugfs_init(struct platform_device *pdev);
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/**
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* @brief Initiallze PVA abort handler
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*
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* @param pva Pointer to PVA structure
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* @return none
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*
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*/
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void pva_abort_init(struct pva *pva);
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/**
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* @brief Recover PVA back into working state
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*
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* @param pva Pointer to PVA structure
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* @return none
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*
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*/
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void pva_abort(struct pva *pva);
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/**
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* @brief Run the ucode selftests
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*
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* This function is invoked if the ucode is in selftest mode.
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* The function will do the static memory allocation for the
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* ucode self test to run.
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*
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* @param pdev Pointer to PVA device
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* @return 0 on Success or negative error code
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*
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*/
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int pva_run_ucode_selftest(struct platform_device *pdev);
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/**
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* @brief Allocate and populate the function table to the memory
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*
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* This function is called when the vpu table needs to be populated.
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* The function also allocates the memory required for the vpu table.
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*
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* @param pva Pointer to PVA device
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* @param pva_func_table Pointer to the function table which contains
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* the address, table size and number of entries
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* @return 0 on Success or negative error code
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*
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*/
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int pva_alloc_and_populate_function_table(struct pva *pva,
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struct pva_func_table *fn_table);
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/**
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* @brief Deallocate the memory of the function table
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*
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* This function is called once the allocated memory for vpu table needs to
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* be freed.
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*
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* @param pva Pointer to PVA device
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* @param pva_func_table Pointer to the function table which contains
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* the address, table size and number of entries
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*
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*/
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void pva_dealloc_vpu_function_table(struct pva *pva,
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struct pva_func_table *fn_table);
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/**
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* @brief Get PVA version information
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*
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* @param pva Pointer to a PVA device node
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* @param info Pointer to an information structure to be filled
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*
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* @return 0 on success, otherwise a negative error code
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*/
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int pva_get_firmware_version(struct pva *pva,
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struct pva_version_info *info);
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/**
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* @brief Set trace log level of PVA
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*
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* @param pva Pointer to a PVA device node
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* @param log_level 32-bit mask for logs that we want to receive
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*
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* @return 0 on success, otherwise a negative error code
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*/
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int pva_set_log_level(struct pva *pva,
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u32 log_level);
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#endif
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