30 lines
964 B
C
30 lines
964 B
C
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/*
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* Copyright (c) 2018 NVIDIA Corporation. All rights reserved.
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*
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* NVIDIA Corporation and its licensors retain all intellectual property
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* and proprietary rights in and to this software and related documentation
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* and any modifications thereto. Any use, reproduction, disclosure or
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* distribution of this software and related documentation without an express
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* license agreement from NVIDIA Corporation is strictly prohibited.
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*/
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#ifndef _ARM_SMMU_SUSPEND_H
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#define _ARM_SMMU_SUSPEND_H
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#ifdef CONFIG_PM_SLEEP
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int arm_smmu_suspend_init(void __iomem **smmu_base, u32 *smmu_base_pa,
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int num_smmus, unsigned long smmu_size,
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unsigned long smmu_pgshift, u32 scratch_reg_pa);
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void arm_smmu_suspend_exit(void);
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#else
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int arm_smmu_suspend_init(void __iomem **smmu_base, u32 *smmu_base_pa,
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int num_smmus, unsigned long smmu_size,
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unsigned long smmu_pgshift, u32 scratch_reg_pa)
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{
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return 0;
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}
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void arm_smmu_suspend_exit(void) {}
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#endif
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#endif
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