172 lines
3.5 KiB
C
172 lines
3.5 KiB
C
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/*
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* Eventlib interface for PVA
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*
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* Copyright (c) 2016-2019, NVIDIA Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef NVHOST_EVENTS_H
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#define NVHOST_EVENTS_H
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enum {
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NVHOST_SCHEMA_VERSION = 1
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};
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#define NVHOST_EVENT_PROVIDER_NAME "nv_mm_nvhost"
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/* Marks that the task is submitted to hardware */
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struct nvhost_task_submit {
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/* Engine class ID */
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__u32 class_id;
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/* Syncpoint ID */
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__u32 syncpt_id;
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/* Threshold for task completion */
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__u32 syncpt_thresh;
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/* PID */
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__u32 pid;
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/* TID */
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__u32 tid;
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} __packed;
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/* Marks that the task is moving to execution */
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struct nvhost_task_begin {
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/* Engine class ID */
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__u32 class_id;
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/* Syncpoint ID */
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__u32 syncpt_id;
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/* Threshold for task completion */
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__u32 syncpt_thresh;
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} __packed;
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/* Marks that the task is completed */
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struct nvhost_task_end {
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/* Engine class ID */
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__u32 class_id;
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/* Syncpoint ID */
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__u32 syncpt_id;
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/* Threshold for task completion */
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__u32 syncpt_thresh;
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} __packed;
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struct nvhost_vpu_perf_counter {
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/* Engine class ID */
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__u32 class_id;
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/* Syncpoint ID */
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__u32 syncpt_id;
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/* Threshold for task completion */
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__u32 syncpt_thresh;
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/* Identifier for the R5/VPU algorithm executed */
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__u32 operation;
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/* Algorithm specific identifying tag for the perf counter */
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__u32 tag;
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__u32 count;
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__u32 average;
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__u64 variance;
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__u32 minimum;
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__u32 maximum;
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} __packed;
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/* Marks the pre/postfence associated with the task */
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struct nvhost_task_fence {
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/* Engine class ID */
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__u32 class_id;
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/* Kind (prefence or postfence) */
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__u32 kind;
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/* Fence-specific type (see nvdev_fence.h) */
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__u32 fence_type;
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/* Valid for NVDEV_FENCE_TYPE_SYNCPT only */
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__u32 syncpt_id;
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__u32 syncpt_thresh;
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/* The task this fence is associated with */
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__u32 task_syncpt_id;
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__u32 task_syncpt_thresh;
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/* Valid for NVDEV_FENCE_TYPE_SYNC_FD only */
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__u32 sync_fd;
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/* Valid for NVDEV_FENCE_TYPE_SEMAPHORE
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and NVDEV_FENCE_TYPE_SEMAPHORE_TS */
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__u32 semaphore_handle;
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__u32 semaphore_offset;
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__u32 semaphore_value;
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} __packed;
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struct nvhost_pva_task_state {
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/* Engine class ID */
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__u32 class_id;
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/* Syncpoint ID */
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__u32 syncpt_id;
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/* Threshold for task completion */
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__u32 syncpt_thresh;
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/* Identifier for the R5/VPU algorithm executed */
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__u32 operation;
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} __packed;
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enum {
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/* struct nvhost_task_submit */
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NVHOST_TASK_SUBMIT = 0,
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/* struct nvhost_task_begin */
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NVHOST_TASK_BEGIN = 1,
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/* struct nvhost_task_end */
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NVHOST_TASK_END = 2,
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/* struct nvhost_task_fence */
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NVHOST_TASK_FENCE = 3,
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NVHOST_VPU_PERF_COUNTER_BEGIN = 4,
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NVHOST_VPU_PERF_COUNTER_END = 5,
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/* struct nvhost_pva_task_state */
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NVHOST_PVA_QUEUE_BEGIN = 6,
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NVHOST_PVA_QUEUE_END = 7,
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NVHOST_PVA_PREPARE_BEGIN = 8,
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NVHOST_PVA_PREPARE_END = 9,
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NVHOST_PVA_VPU0_BEGIN = 10,
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NVHOST_PVA_VPU0_END = 11,
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NVHOST_PVA_VPU1_BEGIN = 12,
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NVHOST_PVA_VPU1_END = 13,
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NVHOST_PVA_POST_BEGIN = 14,
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NVHOST_PVA_POST_END = 15,
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NVHOST_NUM_EVENT_TYPES = 16
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};
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enum {
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NVHOST_NUM_CUSTOM_FILTER_FLAGS = 0
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};
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#endif /* NVHOST_EVENTS_H */
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