370 lines
10 KiB
C
370 lines
10 KiB
C
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/*
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* Tegra PVA Driver ioctls
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*
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* Copyright (c) 2016-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __LINUX_NVHOST_PVA_IOCTL_H
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#define __LINUX_NVHOST_PVA_IOCTL_H
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#include <linux/ioctl.h>
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#include <linux/types.h>
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#include "nvdev_fence.h"
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#if !defined(__KERNEL__)
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#define __user
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#endif
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#define NVHOST_PVA_IOCTL_MAGIC 'P'
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/**
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* struct pva_characteristics_req - Request filling of characteristics struct
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*
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* @characteristics: pointer to be filled with characteristics
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* @characteristics_size: size in bytes
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* @characteristics_filled: reserved(set to zero)
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*
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*/
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struct pva_characteristics_req {
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__u64 characteristics;
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__u64 characteristics_size;
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__u64 characteristics_filled;
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};
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/**
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* struct pva_characteristics - the information of the pva cluster
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*
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* @num_vpu: number of vpu per pva
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* @vpu_generation: vpu hardware generation
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* @num_queues: number of queues per pva
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* @submit_mode: PVA submission mode
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* @pva_r5_revision: PVA R5 firmware revision
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* @pva_compat_version: Earliest version supporting the firmware
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* @pva_revision: PVA revision
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* @pva_built_on: Firmware build information
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*
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*/
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struct pva_characteristics {
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__u8 num_vpu;
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__u8 vpu_generation;
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__u8 num_queues;
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#define PVA_CHARACTERISTCS_IOCTL_SUBMIT_MODE_MAILBOX 0
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#define PVA_CHARACTERISTCS_IOCTL_SUBMIT_MODE_MMIO_CCQ 1
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#define PVA_CHARACTERISTCS_IOCTL_SUBMIT_MODE_CHANNEL_CCQ 2
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__u8 submit_mode;
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__u32 pva_r5_version;
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__u32 pva_compat_version;
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__u32 pva_revision;
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__u32 pva_built_on;
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};
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/**
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* struct pva_pin_unpin_args - buffer handles to pin or unpin
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*
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* @buffers: Pointer to the table of u32
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* @num_buffers: elements in the buffer table
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* @reserved: reserved
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*
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* Used to deliver information about the buffer handles that should be
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* be pinned into (or unpinned from) the PVA address space.
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*
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*/
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struct pva_pin_unpin_args {
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__u64 buffers;
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__u32 num_buffers;
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__u32 reserved;
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};
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#define PVA_MAX_PIN_BUFFERS 64
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/**
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* struct pva_memory_handle - A handle to PVA pointer
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*
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* @handle: Handle to a dmabuf that holds the data
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* @offset: An offset within the buffer to the data within the buffer
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*/
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struct pva_memory_handle {
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__u32 handle;
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__u32 offset;
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};
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/**
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* struct pva_ioctl_status_handle - A handle to a status structure
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*
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* @handle: Handle to a dmabuf that holds the status buffer
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* @offset: An offset within the buffer to the status structure.
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*/
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struct pva_status_handle {
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__u32 handle;
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__u32 offset;
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};
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/**
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* struct pva_ioctl_surface - The surface descriptor
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*
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* @format: Surface pixel format
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* @surface_handle: Memory handle that holds the surface
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* @surface_offset: Offset within the surface memory buffer to the surface
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* @roi_handle: Memory handle that holds the ROI
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* @roi_offset: Offset within the ROI memory buffer to the ROI
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* @surface_stride: Offset between planes in bytes
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* @line_stride: Offset between two consequent lines in bytes.
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* @depth: Number of planes in the surface
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* @width: Width of the surface
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* @height: Height of the surface
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* @layout: Surface layout (pitch linear, block linear)
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* @block_height_log2: Block height
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*
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* This structure defines a list of surfaces to be delivered for
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* PVA.
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*/
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struct pva_surface {
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__u64 format;
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__u32 surface_handle;
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__u32 surface_offset;
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__u32 roi_handle;
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__u32 roi_offset;
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__u32 surface_stride;
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__u32 line_stride;
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__u32 depth;
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__u32 width;
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__u32 height;
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__u16 layout;
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__u16 block_height_log2;
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};
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/**
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* struct pva_ioct_task_parameter - Parameter structure for a task
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*
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* @handle: Memory handle including the parameter array. This field shall be
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* used in cases where the UMD prepares the data in advance to a
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* shared buffer or the input data is prepared by the upstream engine.
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* @offset: Offset within the memory handle to the parameter array
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*
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* The parameter descriptor defines a single parameter array that is
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* received. The handle and offset is translated into IOVA by the kernel
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* driver and delivered to PVA.
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*/
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struct pva_task_parameter {
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__u32 handle;
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__u32 offset;
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};
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/**
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* struct pva_ioctl_fence structure for passing fence information
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*
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* NOTE: this will be removed soon, please use generic fence type
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* from nvdev_fence.h
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*/
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struct pva_fence {
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__u32 type;
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#define PVA_FENCE_TYPE_SYNCPT 0
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#define PVA_FENCE_TYPE_SYNC_FD 1
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#define PVA_FENCE_TYPE_SEMAPHORE 2
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#define PVA_FENCE_TYPE_SEMAPHORE_TS 3
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__u32 syncpoint_index;
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__u32 syncpoint_value;
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__u32 sync_fd;
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__u32 semaphore_handle;
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__u32 semaphore_offset;
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__u32 semaphore_value;
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};
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/**
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* PVA extended fence
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*
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* @param type fence type
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* @param fence nvdev_fence
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* @param ts_buf_handle Handle of timestamp buffer
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*/
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struct nvpva_fence {
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__u32 type;
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#define PVA_FENCE_PRE 1U
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#define PVA_FENCE_SOT_V 2U
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#define PVA_FENCE_SOT_R 3U
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#define PVA_FENCE_EOT_V 4U
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#define PVA_FENCE_EOT_R 5U
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#define PVA_FENCE_POST 6U
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struct pva_memory_handle ts_buf_ptr;
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struct nvdev_fence fence;
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};
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#define PVA_MAX_TASKS 1
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#define PVA_MAX_PREFENCES 8
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#define PVA_MAX_POSTFENCES 8
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#define PVA_MAX_FENCE_TYPES 7
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#define PVA_MAX_FENCES_PER_TYPE 8
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#define PVA_MAX_INPUT_STATUS 8
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#define PVA_MAX_OUTPUT_STATUS 8
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#define PVA_MAX_INPUT_SURFACES 8
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#define PVA_MAX_OUTPUT_SURFACES 8
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#define PVA_MAX_POINTERS 128
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#define PVA_MAX_PRIMARY_PAYLOAD_SIZE 4096
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/**
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* struct pva_ioctl_submit_task - Describe a task for PVA
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*
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* @num_prefences: Number of pre-fences in this task
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* @num_postfences: Number of post-fences in this task
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* @num_input_surfaces: Number of input surfaces
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* @num_output_surfaces: Number of output surfaces
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* @num_input_task_status: Number of input task status structures
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* @num_output_task_status: Number of output task status structures
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* @reserved: Reserved for future usage.
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* @timeout: Latest Unix time when the task must complete. 0 if disabled.
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* @prefences: Pointer to pre-fence structures
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* @postfences: Pointer to post-fence structures
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* @input_surfaces: Pointer to input surfaces
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* @input_scalars: Information for input scalars
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* @output_surfaces: Pointer to output surfaces
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* @output_scalars: Information for output scalars
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* @input_task_status: Pointer to input status structure
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* @output_task_status: Pointer to output status structure
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*
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* This structure is used for delivering information that is required to
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* finish a single task on PVA.
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*
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*/
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struct pva_ioctl_submit_task {
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__u8 num_prefences;
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__u8 redserved1;
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__u8 num_input_surfaces;
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__u8 num_output_surfaces;
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__u8 num_input_task_status;
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__u8 num_output_task_status;
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__u16 num_pointers;
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__u64 pointers;
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__u32 primary_payload_size;
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__u32 operation;
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__u64 timeout;
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__u64 prefences;
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__u8 reserved2[8];
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__u64 input_surfaces;
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struct pva_task_parameter input_scalars;
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__u64 primary_payload;
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__u8 reserved3[8];
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__u64 output_surfaces;
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struct pva_task_parameter output_scalars;
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__u64 num_pva_ts_buffers;
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__u64 num_pvafences;
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__u64 pvafences;
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__u64 input_task_status;
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__u64 output_task_status;
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};
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/**
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* struct pva_submit_args - submit tasks to PVA
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*
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* @tasks: Pointer to a list of tasks structures
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* @flags: Flags for the given tasks
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* @num_tasks: Number of tasks in the list
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* @version: Version of the task structure.
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*
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* This ioctl is used for submitting tasks to PVA. The given structures
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* are modified to include information about post-fences.
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*
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*/
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struct pva_ioctl_submit_args {
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__u64 tasks;
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__u16 flags;
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__u16 num_tasks;
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__u32 version;
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};
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/**
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* struct pva_ioctl_queue_attr - set queue attributes
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*
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* @attr_id: Attribute id which defines the attribute to be set
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* @reserved: reserved
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* @attr_val: The value to be set for the attribute
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*
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* This ioctl is used for setting attributes for a queue with id queue_id
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* on the R5.
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*
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*/
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struct pva_ioctl_queue_attr {
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__u16 id;
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__u16 reserved;
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__u32 val;
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};
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/**
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* struct pva_ioctl_vpu_func_table - ioctl vpu function table entries
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*
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* @addr: Userspace address space to which the function table needs to be copied
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* @entries: The number of entries in the vpu table
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* @size: Size of the user buffer passed/ Size of the function table
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*
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* This ioctl is used to fetch the VPU function table available on a PVA, which
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* is copied to user space buffer starting at "addr" with size "size". Once the
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* function table is copied the the number of entries is updated along with the
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* size of the vpu function table.
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*
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*/
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struct pva_ioctl_vpu_func_table {
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__u64 addr;
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__u32 entries;
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__u32 size;
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};
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/**
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* enum pva_clk_type - Clock type identifier while setting the frequency.
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*
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* PVA KMD supports three request types: Minimum, bandwidth and bandwidth
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* (kHz). All bandwidth requests are summed up and treated as one of the
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* minimum frequency requests. KMD then takes the maximum over all minimum
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* requests and tries to set the frequency to PVA.
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*/
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enum pva_clk_type {
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PVA_CLOCK = 0,
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PVA_BW = 1,
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PVA_BW_KHZ = 3,
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};
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/**
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* struct pva_ioctl_rate - Requesting PVA frequency update
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*
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* @param rate: Requested rate
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* @param type: Type of the request according to pva_clk_type
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* @param reserved: Reserved for future usage. Must be 0.
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*/
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struct pva_ioctl_rate {
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__u64 rate;
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__u32 type;
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__u32 reserved;
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};
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#define PVA_IOCTL_CHARACTERISTICS \
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_IOWR(NVHOST_PVA_IOCTL_MAGIC, 1, struct pva_characteristics_req)
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#define PVA_IOCTL_PIN \
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_IOW(NVHOST_PVA_IOCTL_MAGIC, 2, struct pva_pin_unpin_args)
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#define PVA_IOCTL_UNPIN \
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_IOW(NVHOST_PVA_IOCTL_MAGIC, 3, struct pva_pin_unpin_args)
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#define PVA_IOCTL_SUBMIT \
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_IOW(NVHOST_PVA_IOCTL_MAGIC, 4, struct pva_ioctl_submit_args)
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#define PVA_IOCTL_SET_QUEUE_ATTRIBUTES \
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_IOW(NVHOST_PVA_IOCTL_MAGIC, 5, struct pva_ioctl_queue_attr)
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#define PVA_IOCTL_COPY_VPU_FUNCTION_TABLE \
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_IOWR(NVHOST_PVA_IOCTL_MAGIC, 6, struct pva_ioctl_vpu_func_table)
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#define PVA_IOCTL_SET_RATE \
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_IOWR(NVHOST_PVA_IOCTL_MAGIC, 7, struct pva_ioctl_rate)
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#define PVA_IOCTL_GET_RATE \
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_IOWR(NVHOST_PVA_IOCTL_MAGIC, 8, struct pva_ioctl_rate)
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#define NVHOST_PVA_IOCTL_LAST _IOC_NR(PVA_IOCTL_GET_RATE)
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#define NVHOST_PVA_IOCTL_MAX_ARG_SIZE sizeof(struct pva_characteristics_req)
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#endif /* __LINUX_NVHOST_PVA_IOCTL_H */
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