54 lines
2.1 KiB
Plaintext
54 lines
2.1 KiB
Plaintext
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/*
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* arch/arm/boot/dts/panel-a-lvds-800-480-14-0.dtsi
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*
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* Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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#include <dt-bindings/display/tegra-dc.h>
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#include <dt-bindings/display/tegra-panel.h>
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/ {
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host1x {
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sor {
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panel_lvds_800_480: panel-lvds-800-480 {
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status = "disabled";
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compatible = "lvds,display";
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nvidia,edid = [00 FF FF FF FF FF FF 00 04 21 00 00 00 00 00 00
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01 00 01 03 00 00 00 00 00 00 00 00 00 00 00 00
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00 00 00 00 00 00 01 01 01 01 01 01 01 01 01 01
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01 01 01 01 01 01 FE 0C 20 00 31 E0 2D 10 40 40
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43 00 00 00 00 00 00 00 00 00 00 10 00 00 00 00
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00 00 00 00 00 00 00 00 00 00 00 00 00 10 00 00
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00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 10
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00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 61];
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disp-default-out {
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nvidia,out-type = <TEGRA_DC_OUT_LVDS>;
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nvidia,out-align = <TEGRA_DC_ALIGN_MSB>;
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nvidia,out-order = <TEGRA_DC_ORDER_RED_BLUE>;
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nvidia,out-flags = <TEGRA_DC_OUT_CONTINUOUS_MODE>;
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nvidia,out-pins = <TEGRA_DC_OUT_PIN_H_SYNC TEGRA_DC_OUT_PIN_POL_LOW
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TEGRA_DC_OUT_PIN_V_SYNC TEGRA_DC_OUT_PIN_POL_LOW
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TEGRA_DC_OUT_PIN_PIXEL_CLOCK TEGRA_DC_OUT_PIN_POL_LOW
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TEGRA_DC_OUT_PIN_DATA_ENABLE TEGRA_DC_OUT_PIN_POL_HIGH>;
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nvidia,out-depth = <18>;
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nvidia,out-parent-clk = "pll_d_out0";
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nvidia,dither = <TEGRA_DC_ORDERED_DITHER>;
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};
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};
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};
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};
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};
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