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tegrakernel/hardware/nvidia/soc/t210/kernel-dts/tegra210b01-soc/tegra210b01-hdmi-prods.dtsi

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initial commit tegra kernel 32.6.1
2022-02-16 09:13:02 -06:00
/*
* tegra210b01-soc-prod.dtsi: SOC specific DTSI file Prod nodes.
*
* Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*/
#define SOR_NV_PDISP_SOR_PLL0 0x5C
#define SOR_NV_PDISP_SOR_PLL1 0x60
#define SOR_NV_PDISP_SOR_PLL2 0x64
#define SOR_NV_PDISP_SOR_PLL3 0x68
#define SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0 0x138
#define SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0 0x148
#define SOR_NV_PDISP_SOR_DP_PADCTL0 0x170
#define SOR_NV_PDISP_SOR_DP_PADCTL2 0x1CC
/ {
host1x {
sor1 {
prod-settings {
#prod-cells = <3>;
prod_list_hdmi_soc = "prod_c_hdmi_0m_54m", "prod_c_hdmi_54m_111m",
"prod_c_hdmi_111m_223m", "prod_c_hdmi_223m_300m",
"prod_c_hdmi_300m_600m";
prod_c_hdmi_0m_54m {
asic {
prod = <0x000003a0 0x00000002 0x00000002>; /* SOR_NV_PDISP_INPUT_CONTROL 00:00=HDMI_SRC_SELECT 0x2 */
};
char {
prod = <
SOR_NV_PDISP_SOR_PLL0 0x0F0F0F00 0x05050100
SOR_NV_PDISP_SOR_PLL1 0x00F01F00 0x00401300
SOR_NV_PDISP_SOR_PLL2 0x0000FF00 0x0
SOR_NV_PDISP_SOR_PLL3 0xFF000FF0 0x38000440
SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0 0xFFFFFFFF 0x333A3A3A
SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0 0xFFFFFFFF 0x0
SOR_NV_PDISP_SOR_DP_PADCTL0 0x0040FF00 0x401000
SOR_NV_PDISP_SOR_DP_PADCTL2 0xFF000000 0x54000000
>;
};
};
prod_c_hdmi_54m_111m {
asic {
prod = <0x000003a0 0x00000002 0x00000002>; /* SOR_NV_PDISP_INPUT_CONTROL 00:00=HDMI_SRC_SELECT 0x2 */
};
char {
prod = <
SOR_NV_PDISP_SOR_PLL0 0x0F0F0F00 0x05050100
SOR_NV_PDISP_SOR_PLL1 0x00F01F00 0x00401300
SOR_NV_PDISP_SOR_PLL2 0x0000FF00 0x0
SOR_NV_PDISP_SOR_PLL3 0xFF000FF0 0x38000440
SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0 0xFFFFFFFF 0x333A3A3A
SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0 0xFFFFFFFF 0x0
SOR_NV_PDISP_SOR_DP_PADCTL0 0x0040FF00 0x404000
SOR_NV_PDISP_SOR_DP_PADCTL2 0xFF000000 0x44000000
>;
};
};
prod_c_hdmi_111m_223m {
asic {
prod = <0x000003a0 0x00000002 0x00000000>; /* SOR_NV_PDISP_INPUT_CONTROL 00:00=HDMI_SRC_SELECT 0x2 */
};
char {
prod = <
SOR_NV_PDISP_SOR_PLL0 0x0F0F0F00 0x05050300
SOR_NV_PDISP_SOR_PLL1 0x00F01F00 0x00401300
SOR_NV_PDISP_SOR_PLL2 0x0000FF00 0x0
SOR_NV_PDISP_SOR_PLL3 0xFF000FF0 0x38000440
SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0 0xFFFFFFFF 0x333A3A3A
SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0 0xFFFFFFFF 0x0
SOR_NV_PDISP_SOR_DP_PADCTL0 0x0040FF00 0x406600
SOR_NV_PDISP_SOR_DP_PADCTL2 0xFF000000 0x34000000
>;
};
};
prod_c_hdmi_223m_300m {
asic {
prod = <0x000003a0 0x00000002 0x00000000>; /* SOR_NV_PDISP_INPUT_CONTROL 00:00=HDMI_SRC_SELECT 0x0 */
};
char {
prod = <
SOR_NV_PDISP_SOR_PLL0 0x0F0F0F00 0x05050300
SOR_NV_PDISP_SOR_PLL1 0x00F01F00 0x00401300
SOR_NV_PDISP_SOR_PLL2 0x0000FF00 0x0
SOR_NV_PDISP_SOR_PLL3 0xFF000FF0 0x38000440
SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0 0xFFFFFFFF 0x333F3F3F
SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0 0xFFFFFFFF 0x0
SOR_NV_PDISP_SOR_DP_PADCTL0 0x0040FF00 0x406600
SOR_NV_PDISP_SOR_DP_PADCTL2 0xFF000000 0x34000000
>;
};
};
prod_c_hdmi_300m_600m {
asic {
prod = <0x000003a0 0x00000002 0x00000002>; /* SOR_NV_PDISP_INPUT_CONTROL 00:00=HDMI_SRC_SELECT 0x0 */
};
char {
prod = <
SOR_NV_PDISP_SOR_PLL0 0x0F0F0F00 0x05050300
SOR_NV_PDISP_SOR_PLL1 0x00F01F00 0x00401300
SOR_NV_PDISP_SOR_PLL2 0x0000FF00 0x0
SOR_NV_PDISP_SOR_PLL3 0xFF000FF0 0x38000440
SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0 0xFFFFFFFF 0x333F3F3F
SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0 0xFFFFFFFF 0x0
SOR_NV_PDISP_SOR_DP_PADCTL0 0x0040FF00 0x406600
SOR_NV_PDISP_SOR_DP_PADCTL2 0xFF000000 0x34000000
>;
};
};
/* HDMI prod-settings for fall-back to old DT config
* when prod_list_hdmi_soc/board are not found */
prod_c_54M {
asic {
prod = <0x000003a0 0x00000002 0x00000002>; /* SOR_NV_PDISP_INPUT_CONTROL 00:00=HDMI_SRC_SELECT 0x2 */
};
char {
prod = <
SOR_NV_PDISP_SOR_PLL0 0x0F0F0F00 0x05050100
SOR_NV_PDISP_SOR_PLL1 0x00F01F00 0x00401300
SOR_NV_PDISP_SOR_PLL2 0x0000FF00 0x0
SOR_NV_PDISP_SOR_PLL3 0xFF000FF0 0x38000440
SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0 0xFFFFFFFF 0x333A3A3A
SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0 0xFFFFFFFF 0x0
SOR_NV_PDISP_SOR_DP_PADCTL0 0x0040FF00 0x401000
SOR_NV_PDISP_SOR_DP_PADCTL2 0xFF000000 0x54000000
>;
};
};
prod_c_75M {
asic {
prod = <0x000003a0 0x00000002 0x00000002>; /* SOR_NV_PDISP_INPUT_CONTROL 00:00=HDMI_SRC_SELECT 0x2 */
};
char {
prod = <
SOR_NV_PDISP_SOR_PLL0 0x0F0F0F00 0x05050100
SOR_NV_PDISP_SOR_PLL1 0x00F01F00 0x00401300
SOR_NV_PDISP_SOR_PLL2 0x0000FF00 0x0
SOR_NV_PDISP_SOR_PLL3 0xFF000FF0 0x38000440
SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0 0xFFFFFFFF 0x333A3A3A
SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0 0xFFFFFFFF 0x0
SOR_NV_PDISP_SOR_DP_PADCTL0 0x0040FF00 0x404000
SOR_NV_PDISP_SOR_DP_PADCTL2 0xFF000000 0x44000000
>;
};
};
prod_c_150M {
asic {
prod = <0x000003a0 0x00000002 0x00000000>; /* SOR_NV_PDISP_INPUT_CONTROL 00:00=HDMI_SRC_SELECT 0x2 */
};
char {
prod = <
SOR_NV_PDISP_SOR_PLL0 0x0F0F0F00 0x05050300
SOR_NV_PDISP_SOR_PLL1 0x00F01F00 0x00401300
SOR_NV_PDISP_SOR_PLL2 0x0000FF00 0x0
SOR_NV_PDISP_SOR_PLL3 0xFF000FF0 0x38000440
SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0 0xFFFFFFFF 0x333A3A3A
SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0 0xFFFFFFFF 0x0
SOR_NV_PDISP_SOR_DP_PADCTL0 0x0040FF00 0x406600
SOR_NV_PDISP_SOR_DP_PADCTL2 0xFF000000 0x34000000
>;
};
};
prod_c_300M {
asic {
prod = <0x000003a0 0x00000002 0x00000000>; /* SOR_NV_PDISP_INPUT_CONTROL 00:00=HDMI_SRC_SELECT 0x0 */
};
char {
prod = <
SOR_NV_PDISP_SOR_PLL0 0x0F0F0F00 0x05050300
SOR_NV_PDISP_SOR_PLL1 0x00F01F00 0x00401300
SOR_NV_PDISP_SOR_PLL2 0x0000FF00 0x0
SOR_NV_PDISP_SOR_PLL3 0xFF000FF0 0x38000440
SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0 0xFFFFFFFF 0x333F3F3F
SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0 0xFFFFFFFF 0x0
SOR_NV_PDISP_SOR_DP_PADCTL0 0x0040FF00 0x406600
SOR_NV_PDISP_SOR_DP_PADCTL2 0xFF000000 0x34000000
>;
};
};
prod_c_600M {
asic {
prod = <0x000003a0 0x00000002 0x00000002>; /* SOR_NV_PDISP_INPUT_CONTROL 00:00=HDMI_SRC_SELECT 0x0 */
};
char {
prod = <
SOR_NV_PDISP_SOR_PLL0 0x0F0F0F00 0x05050300
SOR_NV_PDISP_SOR_PLL1 0x00F01F00 0x00401300
SOR_NV_PDISP_SOR_PLL2 0x0000FF00 0x0
SOR_NV_PDISP_SOR_PLL3 0xFF000FF0 0x38000440
SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0 0xFFFFFFFF 0x333F3F3F
SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0 0xFFFFFFFF 0x0
SOR_NV_PDISP_SOR_DP_PADCTL0 0x0040FF00 0x406600
SOR_NV_PDISP_SOR_DP_PADCTL2 0xFF000000 0x34000000
>;
};
};
};
};
};
};