47 lines
1.4 KiB
Plaintext
47 lines
1.4 KiB
Plaintext
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Rockchip specific extensions to the Synopsys Designware HDMI
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================================
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Required properties:
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- compatible: "rockchip,rk3288-dw-hdmi";
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- reg: Physical base address and length of the controller's registers.
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- clocks: phandle to hdmi iahb and isfr clocks.
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- clock-names: should be "iahb" "isfr"
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- rockchip,grf: this soc should set GRF regs to mux vopl/vopb.
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- interrupts: HDMI interrupt number
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- ports: contain a port node with endpoint definitions as defined in
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Documentation/devicetree/bindings/media/video-interfaces.txt. For
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vopb,set the reg = <0> and set the reg = <1> for vopl.
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- reg-io-width: the width of the reg:1,4, the value should be 4 on
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rk3288 platform
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Optional properties
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- ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing
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- clocks, clock-names: phandle to the HDMI CEC clock, name should be "cec"
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Example:
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hdmi: hdmi@ff980000 {
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compatible = "rockchip,rk3288-dw-hdmi";
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reg = <0xff980000 0x20000>;
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reg-io-width = <4>;
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ddc-i2c-bus = <&i2c5>;
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rockchip,grf = <&grf>;
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interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>;
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clock-names = "iahb", "isfr";
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status = "disabled";
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ports {
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hdmi_in: port {
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#address-cells = <1>;
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#size-cells = <0>;
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hdmi_in_vopb: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&vopb_out_hdmi>;
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};
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hdmi_in_vopl: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&vopl_out_hdmi>;
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};
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};
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};
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};
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