84 lines
3.2 KiB
Plaintext
84 lines
3.2 KiB
Plaintext
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* TI - TSC ADC (Touschscreen and analog digital converter)
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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Required properties:
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- child "tsc"
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ti,wires: Wires refer to application modes i.e. 4/5/8 wire touchscreen
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support on the platform.
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ti,x-plate-resistance: X plate resistance
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ti,coordinate-readouts: The sequencer supports a total of 16
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programmable steps each step is used to
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read a single coordinate. A single
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readout is enough but multiple reads can
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increase the quality.
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A value of 5 means, 5 reads for X, 5 for
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Y and 2 for Z (always). This utilises 12
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of the 16 software steps available. The
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remaining 4 can be used by the ADC.
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ti,wire-config: Different boards could have a different order for
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connecting wires on touchscreen. We need to provide an
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8 bit number where in the 1st four bits represent the
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analog lines and the next 4 bits represent positive/
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negative terminal on that input line. Notations to
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represent the input lines and terminals resoectively
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is as follows:
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AIN0 = 0, AIN1 = 1 and so on till AIN7 = 7.
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XP = 0, XN = 1, YP = 2, YN = 3.
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- child "adc"
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ti,adc-channels: List of analog inputs available for ADC.
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AIN0 = 0, AIN1 = 1 and so on till AIN7 = 7.
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Optional properties:
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- child "tsc"
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ti,charge-delay: Length of touch screen charge delay step in terms of
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ADC clock cycles. Charge delay value should be large
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in order to avoid false pen-up events. This value
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effects the overall sampling speed, hence need to be
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kept as low as possible, while avoiding false pen-up
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event. Start from a lower value, say 0x400, and
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increase value until false pen-up events are avoided.
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The pen-up detection happens immediately after the
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charge step, so this does in fact function as a
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hardware knob for adjusting the amount of "settling
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time".
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- child "adc"
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ti,chan-step-opendelay: List of open delays for each channel of
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ADC in the order of ti,adc-channels. The
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value corresponds to the number of ADC
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clock cycles to wait after applying the
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step configuration registers and before
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sending the start of ADC conversion.
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Maximum value is 0x3FFFF.
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ti,chan-step-sampledelay: List of sample delays for each channel
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of ADC in the order of ti,adc-channels.
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The value corresponds to the number of
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ADC clock cycles to sample (to hold
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start of conversion high).
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Maximum value is 0xFF.
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ti,chan-step-avg: Number of averages to be performed for each
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channel of ADC. If average is 16 then input
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is sampled 16 times and averaged to get more
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accurate value. This increases the time taken
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by ADC to generate a sample. Valid range is 0
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average to 16 averages. Maximum value is 16.
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Example:
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tscadc: tscadc@44e0d000 {
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compatible = "ti,am3359-tscadc";
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tsc {
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ti,wires = <4>;
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ti,x-plate-resistance = <200>;
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ti,coordiante-readouts = <5>;
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ti,wire-config = <0x00 0x11 0x22 0x33>;
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ti,charge-delay = <0x400>;
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};
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adc {
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ti,adc-channels = <4 5 6 7>;
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ti,chan-step-opendelay = <0x098 0x3ffff 0x098 0x0>;
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ti,chan-step-sampledelay = <0xff 0x0 0xf 0x0>;
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ti,chan-step-avg = <16 2 4 8>;
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};
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}
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