51 lines
1.5 KiB
Plaintext
51 lines
1.5 KiB
Plaintext
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* Marvell sdhci-pxa v2/v3 controller
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This file documents differences between the core properties in mmc.txt
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and the properties used by the sdhci-pxav2 and sdhci-pxav3 drivers.
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Required properties:
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- compatible: Should be "mrvl,pxav2-mmc", "mrvl,pxav3-mmc" or
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"marvell,armada-380-sdhci".
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- reg:
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* for "mrvl,pxav2-mmc" and "mrvl,pxav3-mmc", one register area for
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the SDHCI registers.
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* for "marvell,armada-380-sdhci", three register areas. The first
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one for the SDHCI registers themselves, the second one for the
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AXI/Mbus bridge registers of the SDHCI unit, the third one for the
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SDIO3 Configuration register
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- reg names: should be "sdhci", "mbus", "conf-sdio3". only mandatory
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for "marvell,armada-380-sdhci"
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- clocks: Array of clocks required for SDHCI; requires at least one for
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I/O clock.
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- clock-names: Array of names corresponding to clocks property; shall be
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"io" for I/O clock and "core" for optional core clock.
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Optional properties:
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- mrvl,clk-delay-cycles: Specify a number of cycles to delay for tuning.
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Example:
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sdhci@d4280800 {
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compatible = "mrvl,pxav3-mmc";
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reg = <0xd4280800 0x800>;
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bus-width = <8>;
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interrupts = <27>;
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clocks = <&chip CLKID_SDIO1XIN>, <&chip CLKID_SDIO1>;
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clock-names = "io", "core";
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non-removable;
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mrvl,clk-delay-cycles = <31>;
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};
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sdhci@d8000 {
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compatible = "marvell,armada-380-sdhci";
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reg-names = "sdhci", "mbus", "conf-sdio3";
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reg = <0xd8000 0x1000>,
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<0xdc000 0x100>;
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<0x18454 0x4>;
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interrupts = <0 25 0x4>;
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clocks = <&gateclk 17>;
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clock-names = "io";
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mrvl,clk-delay-cycles = <0x1F>;
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};
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