60 lines
1.9 KiB
Plaintext
60 lines
1.9 KiB
Plaintext
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Freescale i.MX General Power Controller
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=======================================
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The i.MX6Q General Power Control (GPC) block contains DVFS load tracking
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counters and Power Gating Control (PGC) for the CPU and PU (GPU/VPU) power
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domains.
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Required properties:
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- compatible: Should be "fsl,imx6q-gpc" or "fsl,imx6sl-gpc"
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- reg: should be register base and length as documented in the
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datasheet
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- interrupts: Should contain GPC interrupt request 1
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- pu-supply: Link to the LDO regulator powering the PU power domain
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- clocks: Clock phandles to devices in the PU power domain that need
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to be enabled during domain power-up for reset propagation.
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- #power-domain-cells: Should be 1, see below:
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The gpc node is a power-controller as documented by the generic power domain
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bindings in Documentation/devicetree/bindings/power/power_domain.txt.
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Example:
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gpc: gpc@020dc000 {
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compatible = "fsl,imx6q-gpc";
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reg = <0x020dc000 0x4000>;
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interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>,
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<0 90 IRQ_TYPE_LEVEL_HIGH>;
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pu-supply = <®_pu>;
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clocks = <&clks IMX6QDL_CLK_GPU3D_CORE>,
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<&clks IMX6QDL_CLK_GPU3D_SHADER>,
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<&clks IMX6QDL_CLK_GPU2D_CORE>,
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<&clks IMX6QDL_CLK_GPU2D_AXI>,
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<&clks IMX6QDL_CLK_OPENVG_AXI>,
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<&clks IMX6QDL_CLK_VPU_AXI>;
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#power-domain-cells = <1>;
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};
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Specifying power domain for IP modules
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======================================
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IP cores belonging to a power domain should contain a 'power-domains' property
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that is a phandle pointing to the gpc device node and a DOMAIN_INDEX specifying
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the power domain the device belongs to.
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Example of a device that is part of the PU power domain:
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vpu: vpu@02040000 {
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reg = <0x02040000 0x3c000>;
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/* ... */
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power-domains = <&gpc 1>;
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/* ... */
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};
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The following DOMAIN_INDEX values are valid for i.MX6Q:
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ARM_DOMAIN 0
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PU_DOMAIN 1
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The following additional DOMAIN_INDEX value is valid for i.MX6SL:
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DISPLAY_DOMAIN 2
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