56 lines
1.6 KiB
Plaintext
56 lines
1.6 KiB
Plaintext
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Pistachio Reset Controller
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=============================================================================
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This binding describes a reset controller device that is used to enable and
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disable individual IP blocks within the Pistachio SoC using "soft reset"
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control bits found in the Pistachio SoC top level registers.
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The actual action taken when soft reset is asserted is hardware dependent.
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However, when asserted it may not be possible to access the hardware's
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registers, and following an assert/deassert sequence the hardware's previous
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state may no longer be valid.
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Please refer to Documentation/devicetree/bindings/reset/reset.txt
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for common reset controller binding usage.
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Required properties:
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- compatible: Contains "img,pistachio-reset"
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- #reset-cells: Contains 1
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Example:
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cr_periph: clk@18148000 {
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compatible = "img,pistachio-cr-periph", "syscon", "simple-mfd";
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reg = <0x18148000 0x1000>;
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clocks = <&clk_periph PERIPH_CLK_SYS>;
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clock-names = "sys";
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#clock-cells = <1>;
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pistachio_reset: reset-controller {
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compatible = "img,pistachio-reset";
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#reset-cells = <1>;
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};
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};
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Specifying reset control of devices
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=======================================
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Device nodes should specify the reset channel required in their "resets"
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property, containing a phandle to the pistachio reset device node and an
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index specifying which reset to use, as described in
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Documentation/devicetree/bindings/reset/reset.txt.
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Example:
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spdif_out: spdif-out@18100d00 {
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...
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resets = <&pistachio_reset PISTACHIO_RESET_SPDIF_OUT>;
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reset-names = "rst";
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...
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};
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Macro definitions for the supported resets can be found in:
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include/dt-bindings/reset/pistachio-resets.h
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