37 lines
1.1 KiB
Plaintext
37 lines
1.1 KiB
Plaintext
|
* STMicroelectronics SAS. ST33ZP24 TPM SoC
|
||
|
|
|
||
|
|
Required properties:
|
||
|
|
- compatible: Should be "st,st33zp24-i2c".
|
||
|
|
- clock-frequency: I²C work frequency.
|
||
|
|
- reg: address on the bus
|
||
|
|
|
||
|
|
Optional ST33ZP24 Properties:
|
||
|
|
- interrupt-parent: phandle for the interrupt gpio controller
|
||
|
|
- interrupts: GPIO interrupt to which the chip is connected
|
||
|
|
- lpcpd-gpios: Output GPIO pin used for ST33ZP24 power management D1/D2 state.
|
||
|
|
If set, power must be present when the platform is going into sleep/hibernate mode.
|
||
|
|
|
||
|
|
Optional SoC Specific Properties:
|
||
|
|
- pinctrl-names: Contains only one value - "default".
|
||
|
|
- pintctrl-0: Specifies the pin control groups used for this controller.
|
||
|
|
|
||
|
|
Example (for ARM-based BeagleBoard xM with ST33ZP24 on I2C2):
|
||
|
|
|
||
|
|
&i2c2 {
|
||
|
|
|
||
|
|
status = "okay";
|
||
|
|
|
||
|
|
st33zp24: st33zp24@13 {
|
||
|
|
|
||
|
|
compatible = "st,st33zp24-i2c";
|
||
|
|
|
||
|
|
reg = <0x13>;
|
||
|
|
clock-frequency = <400000>;
|
||
|
|
|
||
|
|
interrupt-parent = <&gpio5>;
|
||
|
|
interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
|
||
|
|
|
||
|
|
lpcpd-gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>;
|
||
|
|
};
|
||
|
|
};
|