52 lines
1.7 KiB
Plaintext
52 lines
1.7 KiB
Plaintext
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MT8173 xHCI
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The device node for Mediatek SOC USB3.0 host controller
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Required properties:
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- compatible : should contain "mediatek,mt8173-xhci"
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- reg : specifies physical base address and size of the registers,
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the first one for MAC, the second for IPPC
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- interrupts : interrupt used by the controller
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- power-domains : a phandle to USB power domain node to control USB's
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mtcmos
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- vusb33-supply : regulator of USB avdd3.3v
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- clocks : a list of phandle + clock-specifier pairs, one for each
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entry in clock-names
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- clock-names : must contain
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"sys_ck": for clock of xHCI MAC
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"wakeup_deb_p0": for USB wakeup debounce clock of port0
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"wakeup_deb_p1": for USB wakeup debounce clock of port1
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- phys : a list of phandle + phy specifier pairs
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Optional properties:
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- mediatek,wakeup-src : 1: ip sleep wakeup mode; 2: line state wakeup
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mode;
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- mediatek,syscon-wakeup : phandle to syscon used to access USB wakeup
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control register, it depends on "mediatek,wakeup-src".
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- vbus-supply : reference to the VBUS regulator;
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- usb3-lpm-capable : supports USB3.0 LPM
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Example:
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usb30: usb@11270000 {
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compatible = "mediatek,mt8173-xhci";
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reg = <0 0x11270000 0 0x1000>,
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<0 0x11280700 0 0x0100>;
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interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
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power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
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clocks = <&topckgen CLK_TOP_USB30_SEL>,
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<&pericfg CLK_PERI_USB0>,
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<&pericfg CLK_PERI_USB1>;
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clock-names = "sys_ck",
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"wakeup_deb_p0",
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"wakeup_deb_p1";
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phys = <&phy_port0 PHY_TYPE_USB3>,
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<&phy_port1 PHY_TYPE_USB2>;
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vusb33-supply = <&mt6397_vusb_reg>;
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vbus-supply = <&usb_p1_vbus>;
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usb3-lpm-capable;
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mediatek,syscon-wakeup = <&pericfg>;
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mediatek,wakeup-src = <1>;
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};
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