273 lines
5.7 KiB
C
273 lines
5.7 KiB
C
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#ifndef _ALPHA_CMPXCHG_H
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#error Do not include xchg.h directly!
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#else
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/*
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* xchg/xchg_local and cmpxchg/cmpxchg_local share the same code
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* except that local version do not have the expensive memory barrier.
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* So this file is included twice from asm/cmpxchg.h.
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*/
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/*
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* Atomic exchange.
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* Since it can be used to implement critical sections
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* it must clobber "memory" (also for interrupts in UP).
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*
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* The leading and the trailing memory barriers guarantee that these
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* operations are fully ordered.
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*
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*/
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static inline unsigned long
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____xchg(_u8, volatile char *m, unsigned long val)
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{
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unsigned long ret, tmp, addr64;
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smp_mb();
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__asm__ __volatile__(
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" andnot %4,7,%3\n"
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" insbl %1,%4,%1\n"
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"1: ldq_l %2,0(%3)\n"
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" extbl %2,%4,%0\n"
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" mskbl %2,%4,%2\n"
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" or %1,%2,%2\n"
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" stq_c %2,0(%3)\n"
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" beq %2,2f\n"
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__ASM__MB
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".subsection 2\n"
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"2: br 1b\n"
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".previous"
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: "=&r" (ret), "=&r" (val), "=&r" (tmp), "=&r" (addr64)
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: "r" ((long)m), "1" (val) : "memory");
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return ret;
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}
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static inline unsigned long
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____xchg(_u16, volatile short *m, unsigned long val)
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{
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unsigned long ret, tmp, addr64;
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smp_mb();
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__asm__ __volatile__(
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" andnot %4,7,%3\n"
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" inswl %1,%4,%1\n"
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"1: ldq_l %2,0(%3)\n"
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" extwl %2,%4,%0\n"
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" mskwl %2,%4,%2\n"
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" or %1,%2,%2\n"
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" stq_c %2,0(%3)\n"
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" beq %2,2f\n"
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__ASM__MB
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".subsection 2\n"
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"2: br 1b\n"
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".previous"
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: "=&r" (ret), "=&r" (val), "=&r" (tmp), "=&r" (addr64)
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: "r" ((long)m), "1" (val) : "memory");
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return ret;
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}
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static inline unsigned long
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____xchg(_u32, volatile int *m, unsigned long val)
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{
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unsigned long dummy;
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smp_mb();
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__asm__ __volatile__(
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"1: ldl_l %0,%4\n"
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" bis $31,%3,%1\n"
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" stl_c %1,%2\n"
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" beq %1,2f\n"
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__ASM__MB
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".subsection 2\n"
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"2: br 1b\n"
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".previous"
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: "=&r" (val), "=&r" (dummy), "=m" (*m)
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: "rI" (val), "m" (*m) : "memory");
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return val;
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}
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static inline unsigned long
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____xchg(_u64, volatile long *m, unsigned long val)
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{
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unsigned long dummy;
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smp_mb();
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__asm__ __volatile__(
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"1: ldq_l %0,%4\n"
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" bis $31,%3,%1\n"
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" stq_c %1,%2\n"
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" beq %1,2f\n"
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__ASM__MB
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".subsection 2\n"
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"2: br 1b\n"
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".previous"
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: "=&r" (val), "=&r" (dummy), "=m" (*m)
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: "rI" (val), "m" (*m) : "memory");
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return val;
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}
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/* This function doesn't exist, so you'll get a linker error
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if something tries to do an invalid xchg(). */
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extern void __xchg_called_with_bad_pointer(void);
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static __always_inline unsigned long
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____xchg(, volatile void *ptr, unsigned long x, int size)
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{
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switch (size) {
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case 1:
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return ____xchg(_u8, ptr, x);
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case 2:
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return ____xchg(_u16, ptr, x);
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case 4:
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return ____xchg(_u32, ptr, x);
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case 8:
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return ____xchg(_u64, ptr, x);
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}
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__xchg_called_with_bad_pointer();
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return x;
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}
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/*
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* Atomic compare and exchange. Compare OLD with MEM, if identical,
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* store NEW in MEM. Return the initial value in MEM. Success is
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* indicated by comparing RETURN with OLD.
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*
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* The leading and the trailing memory barriers guarantee that these
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* operations are fully ordered.
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*
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* The trailing memory barrier is placed in SMP unconditionally, in
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* order to guarantee that dependency ordering is preserved when a
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* dependency is headed by an unsuccessful operation.
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*/
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static inline unsigned long
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____cmpxchg(_u8, volatile char *m, unsigned char old, unsigned char new)
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{
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unsigned long prev, tmp, cmp, addr64;
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smp_mb();
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__asm__ __volatile__(
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" andnot %5,7,%4\n"
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" insbl %1,%5,%1\n"
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"1: ldq_l %2,0(%4)\n"
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" extbl %2,%5,%0\n"
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" cmpeq %0,%6,%3\n"
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" beq %3,2f\n"
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" mskbl %2,%5,%2\n"
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" or %1,%2,%2\n"
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" stq_c %2,0(%4)\n"
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" beq %2,3f\n"
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"2:\n"
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__ASM__MB
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".subsection 2\n"
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"3: br 1b\n"
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".previous"
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: "=&r" (prev), "=&r" (new), "=&r" (tmp), "=&r" (cmp), "=&r" (addr64)
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: "r" ((long)m), "Ir" (old), "1" (new) : "memory");
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return prev;
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}
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static inline unsigned long
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____cmpxchg(_u16, volatile short *m, unsigned short old, unsigned short new)
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{
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unsigned long prev, tmp, cmp, addr64;
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smp_mb();
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__asm__ __volatile__(
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" andnot %5,7,%4\n"
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" inswl %1,%5,%1\n"
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"1: ldq_l %2,0(%4)\n"
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" extwl %2,%5,%0\n"
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" cmpeq %0,%6,%3\n"
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" beq %3,2f\n"
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" mskwl %2,%5,%2\n"
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" or %1,%2,%2\n"
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" stq_c %2,0(%4)\n"
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" beq %2,3f\n"
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"2:\n"
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__ASM__MB
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".subsection 2\n"
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"3: br 1b\n"
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".previous"
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: "=&r" (prev), "=&r" (new), "=&r" (tmp), "=&r" (cmp), "=&r" (addr64)
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: "r" ((long)m), "Ir" (old), "1" (new) : "memory");
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return prev;
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}
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static inline unsigned long
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____cmpxchg(_u32, volatile int *m, int old, int new)
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{
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unsigned long prev, cmp;
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smp_mb();
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__asm__ __volatile__(
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"1: ldl_l %0,%5\n"
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" cmpeq %0,%3,%1\n"
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" beq %1,2f\n"
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" mov %4,%1\n"
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" stl_c %1,%2\n"
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" beq %1,3f\n"
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"2:\n"
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__ASM__MB
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".subsection 2\n"
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"3: br 1b\n"
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".previous"
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: "=&r"(prev), "=&r"(cmp), "=m"(*m)
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: "r"((long) old), "r"(new), "m"(*m) : "memory");
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return prev;
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}
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static inline unsigned long
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____cmpxchg(_u64, volatile long *m, unsigned long old, unsigned long new)
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{
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unsigned long prev, cmp;
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smp_mb();
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__asm__ __volatile__(
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"1: ldq_l %0,%5\n"
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" cmpeq %0,%3,%1\n"
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" beq %1,2f\n"
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" mov %4,%1\n"
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" stq_c %1,%2\n"
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" beq %1,3f\n"
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"2:\n"
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__ASM__MB
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".subsection 2\n"
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"3: br 1b\n"
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".previous"
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: "=&r"(prev), "=&r"(cmp), "=m"(*m)
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: "r"((long) old), "r"(new), "m"(*m) : "memory");
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return prev;
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}
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/* This function doesn't exist, so you'll get a linker error
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if something tries to do an invalid cmpxchg(). */
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extern void __cmpxchg_called_with_bad_pointer(void);
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static __always_inline unsigned long
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____cmpxchg(, volatile void *ptr, unsigned long old, unsigned long new,
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int size)
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{
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switch (size) {
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case 1:
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return ____cmpxchg(_u8, ptr, old, new);
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case 2:
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return ____cmpxchg(_u16, ptr, old, new);
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case 4:
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return ____cmpxchg(_u32, ptr, old, new);
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case 8:
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return ____cmpxchg(_u64, ptr, old, new);
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}
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__cmpxchg_called_with_bad_pointer();
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return old;
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}
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#endif
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