443 lines
10 KiB
Plaintext
443 lines
10 KiB
Plaintext
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/*
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* ARM Ltd. Versatile Express
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*
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* Motherboard Express uATX
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* V2M-P1
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*
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* HBI-0190D
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*
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* RS1 memory map ("ARM Cortex-A Series memory map" in the board's
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* Technical Reference Manual)
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*
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* WARNING! The hardware described in this file is independent from the
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* original variant (vexpress-v2m.dtsi), but there is a strong
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* correspondence between the two configurations.
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*
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* TAKE CARE WHEN MAINTAINING THIS FILE TO PROPAGATE ANY RELEVANT
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* CHANGES TO vexpress-v2m.dtsi!
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*/
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motherboard {
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model = "V2M-P1";
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arm,hbi = <0x190>;
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arm,vexpress,site = <0>;
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arm,v2m-memory-map = "rs1";
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compatible = "arm,vexpress,v2m-p1", "simple-bus";
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#address-cells = <2>; /* SMB chipselect number and offset */
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#size-cells = <1>;
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#interrupt-cells = <1>;
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ranges;
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flash@0,00000000 {
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compatible = "arm,vexpress-flash", "cfi-flash";
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reg = <0 0x00000000 0x04000000>,
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<4 0x00000000 0x04000000>;
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bank-width = <4>;
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};
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psram@1,00000000 {
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compatible = "arm,vexpress-psram", "mtd-ram";
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reg = <1 0x00000000 0x02000000>;
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bank-width = <4>;
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};
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v2m_video_ram: vram@2,00000000 {
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compatible = "arm,vexpress-vram";
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reg = <2 0x00000000 0x00800000>;
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};
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ethernet@2,02000000 {
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compatible = "smsc,lan9118", "smsc,lan9115";
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reg = <2 0x02000000 0x10000>;
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interrupts = <15>;
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phy-mode = "mii";
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reg-io-width = <4>;
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smsc,irq-active-high;
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smsc,irq-push-pull;
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vdd33a-supply = <&v2m_fixed_3v3>;
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vddvario-supply = <&v2m_fixed_3v3>;
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};
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usb@2,03000000 {
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compatible = "nxp,usb-isp1761";
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reg = <2 0x03000000 0x20000>;
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interrupts = <16>;
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port1-otg;
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};
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iofpga@3,00000000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 3 0 0x200000>;
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v2m_sysreg: sysreg@010000 {
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compatible = "arm,vexpress-sysreg";
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reg = <0x010000 0x1000>;
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v2m_led_gpios: sys_led {
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compatible = "arm,vexpress-sysreg,sys_led";
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gpio-controller;
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#gpio-cells = <2>;
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};
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v2m_mmc_gpios: sys_mci {
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compatible = "arm,vexpress-sysreg,sys_mci";
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gpio-controller;
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#gpio-cells = <2>;
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};
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v2m_flash_gpios: sys_flash {
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compatible = "arm,vexpress-sysreg,sys_flash";
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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v2m_sysctl: sysctl@020000 {
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compatible = "arm,sp810", "arm,primecell";
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reg = <0x020000 0x1000>;
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clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&smbclk>;
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clock-names = "refclk", "timclk", "apb_pclk";
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#clock-cells = <1>;
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clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";
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assigned-clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_sysctl 3>, <&v2m_sysctl 3>;
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assigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>;
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};
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/* PCI-E I2C bus */
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v2m_i2c_pcie: i2c@030000 {
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compatible = "arm,versatile-i2c";
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reg = <0x030000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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pcie-switch@60 {
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compatible = "idt,89hpes32h8";
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reg = <0x60>;
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};
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};
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aaci@040000 {
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compatible = "arm,pl041", "arm,primecell";
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reg = <0x040000 0x1000>;
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interrupts = <11>;
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clocks = <&smbclk>;
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clock-names = "apb_pclk";
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};
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mmci@050000 {
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compatible = "arm,pl180", "arm,primecell";
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reg = <0x050000 0x1000>;
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interrupts = <9 10>;
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cd-gpios = <&v2m_mmc_gpios 0 0>;
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wp-gpios = <&v2m_mmc_gpios 1 0>;
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max-frequency = <12000000>;
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vmmc-supply = <&v2m_fixed_3v3>;
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clocks = <&v2m_clk24mhz>, <&smbclk>;
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clock-names = "mclk", "apb_pclk";
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};
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kmi@060000 {
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compatible = "arm,pl050", "arm,primecell";
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reg = <0x060000 0x1000>;
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interrupts = <12>;
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clocks = <&v2m_clk24mhz>, <&smbclk>;
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clock-names = "KMIREFCLK", "apb_pclk";
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};
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kmi@070000 {
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compatible = "arm,pl050", "arm,primecell";
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reg = <0x070000 0x1000>;
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interrupts = <13>;
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clocks = <&v2m_clk24mhz>, <&smbclk>;
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clock-names = "KMIREFCLK", "apb_pclk";
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};
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v2m_serial0: uart@090000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x090000 0x1000>;
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interrupts = <5>;
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clocks = <&v2m_oscclk2>, <&smbclk>;
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clock-names = "uartclk", "apb_pclk";
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};
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v2m_serial1: uart@0a0000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x0a0000 0x1000>;
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interrupts = <6>;
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clocks = <&v2m_oscclk2>, <&smbclk>;
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clock-names = "uartclk", "apb_pclk";
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};
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v2m_serial2: uart@0b0000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x0b0000 0x1000>;
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interrupts = <7>;
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clocks = <&v2m_oscclk2>, <&smbclk>;
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clock-names = "uartclk", "apb_pclk";
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};
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v2m_serial3: uart@0c0000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x0c0000 0x1000>;
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interrupts = <8>;
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clocks = <&v2m_oscclk2>, <&smbclk>;
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clock-names = "uartclk", "apb_pclk";
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};
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wdt@0f0000 {
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compatible = "arm,sp805", "arm,primecell";
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reg = <0x0f0000 0x1000>;
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interrupts = <0>;
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clocks = <&v2m_refclk32khz>, <&smbclk>;
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clock-names = "wdogclk", "apb_pclk";
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};
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v2m_timer01: timer@110000 {
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compatible = "arm,sp804", "arm,primecell";
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reg = <0x110000 0x1000>;
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interrupts = <2>;
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clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&smbclk>;
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clock-names = "timclken1", "timclken2", "apb_pclk";
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};
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v2m_timer23: timer@120000 {
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compatible = "arm,sp804", "arm,primecell";
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reg = <0x120000 0x1000>;
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interrupts = <3>;
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clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&smbclk>;
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clock-names = "timclken1", "timclken2", "apb_pclk";
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};
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/* DVI I2C bus */
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v2m_i2c_dvi: i2c@160000 {
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compatible = "arm,versatile-i2c";
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reg = <0x160000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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dvi-transmitter@39 {
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compatible = "sil,sii9022-tpi", "sil,sii9022";
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reg = <0x39>;
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};
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dvi-transmitter@60 {
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compatible = "sil,sii9022-cpi", "sil,sii9022";
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reg = <0x60>;
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};
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};
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rtc@170000 {
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compatible = "arm,pl031", "arm,primecell";
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reg = <0x170000 0x1000>;
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interrupts = <4>;
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clocks = <&smbclk>;
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clock-names = "apb_pclk";
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};
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compact-flash@1a0000 {
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compatible = "arm,vexpress-cf", "ata-generic";
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reg = <0x1a0000 0x100
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0x1a0100 0xf00>;
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reg-shift = <2>;
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};
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clcd@1f0000 {
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compatible = "arm,pl111", "arm,primecell";
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reg = <0x1f0000 0x1000>;
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interrupt-names = "combined";
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interrupts = <14>;
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clocks = <&v2m_oscclk1>, <&smbclk>;
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clock-names = "clcdclk", "apb_pclk";
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memory-region = <&v2m_video_ram>;
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max-memory-bandwidth = <50350000>; /* 16bpp @ 25.175MHz */
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port {
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v2m_clcd_pads: endpoint {
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remote-endpoint = <&v2m_clcd_panel>;
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arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
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};
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};
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panel {
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compatible = "panel-dpi";
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port {
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v2m_clcd_panel: endpoint {
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remote-endpoint = <&v2m_clcd_pads>;
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};
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};
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panel-timing {
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clock-frequency = <25175000>;
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hactive = <640>;
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hback-porch = <40>;
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hfront-porch = <24>;
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hsync-len = <96>;
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vactive = <480>;
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vback-porch = <32>;
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vfront-porch = <11>;
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vsync-len = <2>;
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};
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};
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};
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};
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v2m_fixed_3v3: fixed-regulator-0 {
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compatible = "regulator-fixed";
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regulator-name = "3V3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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v2m_clk24mhz: clk24mhz {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <24000000>;
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clock-output-names = "v2m:clk24mhz";
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};
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v2m_refclk1mhz: refclk1mhz {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <1000000>;
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clock-output-names = "v2m:refclk1mhz";
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};
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v2m_refclk32khz: refclk32khz {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <32768>;
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clock-output-names = "v2m:refclk32khz";
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};
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leds {
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compatible = "gpio-leds";
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user1 {
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label = "v2m:green:user1";
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gpios = <&v2m_led_gpios 0 0>;
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linux,default-trigger = "heartbeat";
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};
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user2 {
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label = "v2m:green:user2";
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gpios = <&v2m_led_gpios 1 0>;
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linux,default-trigger = "mmc0";
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};
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user3 {
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label = "v2m:green:user3";
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gpios = <&v2m_led_gpios 2 0>;
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linux,default-trigger = "cpu0";
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};
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user4 {
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label = "v2m:green:user4";
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gpios = <&v2m_led_gpios 3 0>;
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linux,default-trigger = "cpu1";
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};
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user5 {
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label = "v2m:green:user5";
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gpios = <&v2m_led_gpios 4 0>;
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linux,default-trigger = "cpu2";
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};
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user6 {
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label = "v2m:green:user6";
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gpios = <&v2m_led_gpios 5 0>;
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linux,default-trigger = "cpu3";
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};
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user7 {
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label = "v2m:green:user7";
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gpios = <&v2m_led_gpios 6 0>;
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linux,default-trigger = "cpu4";
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};
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user8 {
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label = "v2m:green:user8";
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gpios = <&v2m_led_gpios 7 0>;
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linux,default-trigger = "cpu5";
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
mcc {
|
||
|
|
compatible = "arm,vexpress,config-bus";
|
||
|
|
arm,vexpress,config-bridge = <&v2m_sysreg>;
|
||
|
|
|
||
|
|
oscclk0 {
|
||
|
|
/* MCC static memory clock */
|
||
|
|
compatible = "arm,vexpress-osc";
|
||
|
|
arm,vexpress-sysreg,func = <1 0>;
|
||
|
|
freq-range = <25000000 60000000>;
|
||
|
|
#clock-cells = <0>;
|
||
|
|
clock-output-names = "v2m:oscclk0";
|
||
|
|
};
|
||
|
|
|
||
|
|
v2m_oscclk1: oscclk1 {
|
||
|
|
/* CLCD clock */
|
||
|
|
compatible = "arm,vexpress-osc";
|
||
|
|
arm,vexpress-sysreg,func = <1 1>;
|
||
|
|
freq-range = <23750000 65000000>;
|
||
|
|
#clock-cells = <0>;
|
||
|
|
clock-output-names = "v2m:oscclk1";
|
||
|
|
};
|
||
|
|
|
||
|
|
v2m_oscclk2: oscclk2 {
|
||
|
|
/* IO FPGA peripheral clock */
|
||
|
|
compatible = "arm,vexpress-osc";
|
||
|
|
arm,vexpress-sysreg,func = <1 2>;
|
||
|
|
freq-range = <24000000 24000000>;
|
||
|
|
#clock-cells = <0>;
|
||
|
|
clock-output-names = "v2m:oscclk2";
|
||
|
|
};
|
||
|
|
|
||
|
|
volt-vio {
|
||
|
|
/* Logic level voltage */
|
||
|
|
compatible = "arm,vexpress-volt";
|
||
|
|
arm,vexpress-sysreg,func = <2 0>;
|
||
|
|
regulator-name = "VIO";
|
||
|
|
regulator-always-on;
|
||
|
|
label = "VIO";
|
||
|
|
};
|
||
|
|
|
||
|
|
temp-mcc {
|
||
|
|
/* MCC internal operating temperature */
|
||
|
|
compatible = "arm,vexpress-temp";
|
||
|
|
arm,vexpress-sysreg,func = <4 0>;
|
||
|
|
label = "MCC";
|
||
|
|
};
|
||
|
|
|
||
|
|
reset {
|
||
|
|
compatible = "arm,vexpress-reset";
|
||
|
|
arm,vexpress-sysreg,func = <5 0>;
|
||
|
|
};
|
||
|
|
|
||
|
|
muxfpga {
|
||
|
|
compatible = "arm,vexpress-muxfpga";
|
||
|
|
arm,vexpress-sysreg,func = <7 0>;
|
||
|
|
};
|
||
|
|
|
||
|
|
shutdown {
|
||
|
|
compatible = "arm,vexpress-shutdown";
|
||
|
|
arm,vexpress-sysreg,func = <8 0>;
|
||
|
|
};
|
||
|
|
|
||
|
|
reboot {
|
||
|
|
compatible = "arm,vexpress-reboot";
|
||
|
|
arm,vexpress-sysreg,func = <9 0>;
|
||
|
|
};
|
||
|
|
|
||
|
|
dvimode {
|
||
|
|
compatible = "arm,vexpress-dvimode";
|
||
|
|
arm,vexpress-sysreg,func = <11 0>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|