80 lines
1.7 KiB
ArmAsm
80 lines
1.7 KiB
ArmAsm
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/*
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* Accelerated GHASH implementation with ARMv8 PMULL instructions.
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*
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* Copyright (C) 2014 Linaro Ltd. <ard.biesheuvel@linaro.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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SHASH .req v0
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SHASH2 .req v1
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T1 .req v2
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T2 .req v3
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MASK .req v4
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XL .req v5
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XM .req v6
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XH .req v7
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IN1 .req v7
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.text
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.arch armv8-a+crypto
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/*
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* void pmull_ghash_update(int blocks, u64 dg[], const char *src,
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* struct ghash_key const *k, const char *head)
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*/
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ENTRY(pmull_ghash_update)
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ld1 {SHASH.2d}, [x3]
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ld1 {XL.2d}, [x1]
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movi MASK.16b, #0xe1
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ext SHASH2.16b, SHASH.16b, SHASH.16b, #8
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shl MASK.2d, MASK.2d, #57
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eor SHASH2.16b, SHASH2.16b, SHASH.16b
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/* do the head block first, if supplied */
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cbz x4, 0f
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ld1 {T1.2d}, [x4]
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b 1f
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0: ld1 {T1.2d}, [x2], #16
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sub w0, w0, #1
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1: /* multiply XL by SHASH in GF(2^128) */
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CPU_LE( rev64 T1.16b, T1.16b )
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ext T2.16b, XL.16b, XL.16b, #8
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ext IN1.16b, T1.16b, T1.16b, #8
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eor T1.16b, T1.16b, T2.16b
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eor XL.16b, XL.16b, IN1.16b
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pmull2 XH.1q, SHASH.2d, XL.2d // a1 * b1
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eor T1.16b, T1.16b, XL.16b
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pmull XL.1q, SHASH.1d, XL.1d // a0 * b0
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pmull XM.1q, SHASH2.1d, T1.1d // (a1 + a0)(b1 + b0)
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ext T1.16b, XL.16b, XH.16b, #8
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eor T2.16b, XL.16b, XH.16b
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eor XM.16b, XM.16b, T1.16b
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eor XM.16b, XM.16b, T2.16b
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pmull T2.1q, XL.1d, MASK.1d
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mov XH.d[0], XM.d[1]
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mov XM.d[1], XL.d[0]
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eor XL.16b, XM.16b, T2.16b
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ext T2.16b, XL.16b, XL.16b, #8
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pmull XL.1q, XL.1d, MASK.1d
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eor T2.16b, T2.16b, XH.16b
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eor XL.16b, XL.16b, T2.16b
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cbnz w0, 0b
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st1 {XL.2d}, [x1]
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ret
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ENDPROC(pmull_ghash_update)
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