244 lines
6.1 KiB
C
244 lines
6.1 KiB
C
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/*
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* Atomic operations that C can't guarantee us. Useful for
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* resource counting etc.
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*
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* But use these as seldom as possible since they are slower than
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* regular operations.
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*
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* Copyright (C) 2004-2006 Atmel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_AVR32_ATOMIC_H
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#define __ASM_AVR32_ATOMIC_H
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#include <linux/types.h>
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#include <asm/cmpxchg.h>
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#define ATOMIC_INIT(i) { (i) }
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#define atomic_read(v) READ_ONCE((v)->counter)
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#define atomic_set(v, i) WRITE_ONCE(((v)->counter), (i))
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#define ATOMIC_OP_RETURN(op, asm_op, asm_con) \
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static inline int __atomic_##op##_return(int i, atomic_t *v) \
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{ \
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int result; \
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\
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asm volatile( \
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"/* atomic_" #op "_return */\n" \
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"1: ssrf 5\n" \
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" ld.w %0, %2\n" \
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" " #asm_op " %0, %3\n" \
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" stcond %1, %0\n" \
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" brne 1b" \
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: "=&r" (result), "=o" (v->counter) \
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: "m" (v->counter), #asm_con (i) \
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: "cc"); \
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\
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return result; \
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}
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#define ATOMIC_FETCH_OP(op, asm_op, asm_con) \
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static inline int __atomic_fetch_##op(int i, atomic_t *v) \
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{ \
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int result, val; \
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\
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asm volatile( \
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"/* atomic_fetch_" #op " */\n" \
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"1: ssrf 5\n" \
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" ld.w %0, %3\n" \
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" mov %1, %0\n" \
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" " #asm_op " %1, %4\n" \
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" stcond %2, %1\n" \
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" brne 1b" \
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: "=&r" (result), "=&r" (val), "=o" (v->counter) \
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: "m" (v->counter), #asm_con (i) \
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: "cc"); \
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\
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return result; \
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}
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ATOMIC_OP_RETURN(sub, sub, rKs21)
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ATOMIC_OP_RETURN(add, add, r)
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ATOMIC_FETCH_OP (sub, sub, rKs21)
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ATOMIC_FETCH_OP (add, add, r)
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#define ATOMIC_OPS(op, asm_op) \
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ATOMIC_OP_RETURN(op, asm_op, r) \
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static inline void atomic_##op(int i, atomic_t *v) \
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{ \
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(void)__atomic_##op##_return(i, v); \
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} \
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ATOMIC_FETCH_OP(op, asm_op, r) \
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static inline int atomic_fetch_##op(int i, atomic_t *v) \
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{ \
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return __atomic_fetch_##op(i, v); \
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}
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ATOMIC_OPS(and, and)
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ATOMIC_OPS(or, or)
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ATOMIC_OPS(xor, eor)
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#undef ATOMIC_OPS
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#undef ATOMIC_FETCH_OP
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#undef ATOMIC_OP_RETURN
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/*
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* Probably found the reason why we want to use sub with the signed 21-bit
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* limit, it uses one less register than the add instruction that can add up to
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* 32-bit values.
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*
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* Both instructions are 32-bit, to use a 16-bit instruction the immediate is
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* very small; 4 bit.
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*
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* sub 32-bit, type IV, takes a register and subtracts a 21-bit immediate.
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* add 32-bit, type II, adds two register values together.
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*/
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#define IS_21BIT_CONST(i) \
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(__builtin_constant_p(i) && ((i) >= -1048575) && ((i) <= 1048576))
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/*
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* atomic_add_return - add integer to atomic variable
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* @i: integer value to add
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* @v: pointer of type atomic_t
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*
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* Atomically adds @i to @v. Returns the resulting value.
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*/
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static inline int atomic_add_return(int i, atomic_t *v)
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{
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if (IS_21BIT_CONST(i))
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return __atomic_sub_return(-i, v);
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return __atomic_add_return(i, v);
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}
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static inline int atomic_fetch_add(int i, atomic_t *v)
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{
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if (IS_21BIT_CONST(i))
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return __atomic_fetch_sub(-i, v);
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return __atomic_fetch_add(i, v);
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}
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/*
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* atomic_sub_return - subtract the atomic variable
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* @i: integer value to subtract
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* @v: pointer of type atomic_t
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*
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* Atomically subtracts @i from @v. Returns the resulting value.
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*/
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static inline int atomic_sub_return(int i, atomic_t *v)
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{
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if (IS_21BIT_CONST(i))
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return __atomic_sub_return(i, v);
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return __atomic_add_return(-i, v);
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}
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static inline int atomic_fetch_sub(int i, atomic_t *v)
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{
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if (IS_21BIT_CONST(i))
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return __atomic_fetch_sub(i, v);
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return __atomic_fetch_add(-i, v);
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}
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/*
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* __atomic_add_unless - add unless the number is a given value
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* @v: pointer of type atomic_t
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* @a: the amount to add to v...
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* @u: ...unless v is equal to u.
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*
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* Atomically adds @a to @v, so long as it was not @u.
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* Returns the old value of @v.
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*/
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static inline int __atomic_add_unless(atomic_t *v, int a, int u)
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{
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int tmp, old = atomic_read(v);
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if (IS_21BIT_CONST(a)) {
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asm volatile(
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"/* __atomic_sub_unless */\n"
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"1: ssrf 5\n"
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" ld.w %0, %2\n"
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" cp.w %0, %4\n"
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" breq 1f\n"
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" sub %0, %3\n"
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" stcond %1, %0\n"
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" brne 1b\n"
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"1:"
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: "=&r"(tmp), "=o"(v->counter)
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: "m"(v->counter), "rKs21"(-a), "rKs21"(u)
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: "cc", "memory");
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} else {
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asm volatile(
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"/* __atomic_add_unless */\n"
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"1: ssrf 5\n"
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" ld.w %0, %2\n"
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" cp.w %0, %4\n"
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" breq 1f\n"
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" add %0, %3\n"
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" stcond %1, %0\n"
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" brne 1b\n"
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"1:"
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: "=&r"(tmp), "=o"(v->counter)
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: "m"(v->counter), "r"(a), "ir"(u)
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: "cc", "memory");
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}
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return old;
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}
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#undef IS_21BIT_CONST
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/*
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* atomic_sub_if_positive - conditionally subtract integer from atomic variable
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* @i: integer value to subtract
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* @v: pointer of type atomic_t
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*
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* Atomically test @v and subtract @i if @v is greater or equal than @i.
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* The function returns the old value of @v minus @i.
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*/
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static inline int atomic_sub_if_positive(int i, atomic_t *v)
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{
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int result;
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asm volatile(
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"/* atomic_sub_if_positive */\n"
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"1: ssrf 5\n"
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" ld.w %0, %2\n"
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" sub %0, %3\n"
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" brlt 1f\n"
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" stcond %1, %0\n"
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" brne 1b\n"
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"1:"
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: "=&r"(result), "=o"(v->counter)
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: "m"(v->counter), "ir"(i)
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: "cc", "memory");
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return result;
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}
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#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
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#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
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#define atomic_sub(i, v) (void)atomic_sub_return(i, v)
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#define atomic_add(i, v) (void)atomic_add_return(i, v)
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#define atomic_dec(v) atomic_sub(1, (v))
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#define atomic_inc(v) atomic_add(1, (v))
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#define atomic_dec_return(v) atomic_sub_return(1, v)
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#define atomic_inc_return(v) atomic_add_return(1, v)
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#define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0)
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#define atomic_inc_and_test(v) (atomic_add_return(1, v) == 0)
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#define atomic_dec_and_test(v) (atomic_sub_return(1, v) == 0)
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#define atomic_add_negative(i, v) (atomic_add_return(i, v) < 0)
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#define atomic_dec_if_positive(v) atomic_sub_if_positive(1, v)
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#endif /* __ASM_AVR32_ATOMIC_H */
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