586 lines
12 KiB
C
586 lines
12 KiB
C
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/*
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* Copyright 2004-2009 Analog Devices Inc.
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* 2008-2009 Cambridge Signal Processing
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* 2005 National ICT Australia (NICTA)
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* Aidan Williams <aidan@nicta.com.au>
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*
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* Licensed under the GPL-2 or later.
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*/
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/flash.h>
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#if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
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#include <linux/usb/isp1362.h>
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#endif
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#include <linux/ata_platform.h>
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <linux/usb/sl811.h>
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#include <asm/dma.h>
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#include <asm/bfin5xx_spi.h>
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#include <asm/reboot.h>
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#include <asm/portmux.h>
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#include <linux/spi/ad7877.h>
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/*
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* Name the Board for the /proc/cpuinfo
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*/
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const char bfin_board_name[] = "CamSig Minotaur BF537";
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#if IS_ENABLED(CONFIG_BFIN_CFPCMCIA)
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static struct resource bfin_pcmcia_cf_resources[] = {
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{
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.start = 0x20310000, /* IO PORT */
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.end = 0x20312000,
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.flags = IORESOURCE_MEM,
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}, {
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.start = 0x20311000, /* Attribute Memory */
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.end = 0x20311FFF,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_PF4,
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.end = IRQ_PF4,
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
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}, {
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.start = IRQ_PF6, /* Card Detect PF6 */
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.end = IRQ_PF6,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device bfin_pcmcia_cf_device = {
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.name = "bfin_cf_pcmcia",
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.id = -1,
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.num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
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.resource = bfin_pcmcia_cf_resources,
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};
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#endif
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#if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
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static struct platform_device rtc_device = {
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.name = "rtc-bfin",
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.id = -1,
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};
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#endif
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#if IS_ENABLED(CONFIG_BFIN_MAC)
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#include <linux/bfin_mac.h>
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static const unsigned short bfin_mac_peripherals[] = P_MII0;
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static struct bfin_phydev_platform_data bfin_phydev_data[] = {
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{
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.addr = 1,
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.irq = IRQ_MAC_PHYINT,
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},
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};
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static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
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.phydev_number = 1,
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.phydev_data = bfin_phydev_data,
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.phy_mode = PHY_INTERFACE_MODE_MII,
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.mac_peripherals = bfin_mac_peripherals,
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};
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static struct platform_device bfin_mii_bus = {
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.name = "bfin_mii_bus",
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.dev = {
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.platform_data = &bfin_mii_bus_data,
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}
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};
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static struct platform_device bfin_mac_device = {
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.name = "bfin_mac",
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.dev = {
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.platform_data = &bfin_mii_bus,
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}
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};
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#endif
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#if IS_ENABLED(CONFIG_USB_NET2272)
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static struct resource net2272_bfin_resources[] = {
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{
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.start = 0x20300000,
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.end = 0x20300000 + 0x100,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_PF7,
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.end = IRQ_PF7,
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
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},
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};
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static struct platform_device net2272_bfin_device = {
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.name = "net2272",
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.id = -1,
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.num_resources = ARRAY_SIZE(net2272_bfin_resources),
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.resource = net2272_bfin_resources,
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};
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#endif
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#if IS_ENABLED(CONFIG_SPI_BFIN5XX)
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/* all SPI peripherals info goes here */
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#if IS_ENABLED(CONFIG_MTD_M25P80)
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/* Partition sizes */
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#define FLASH_SIZE 0x00400000
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#define PSIZE_UBOOT 0x00030000
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#define PSIZE_INITRAMFS 0x00240000
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static struct mtd_partition bfin_spi_flash_partitions[] = {
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{
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.name = "bootloader(spi)",
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.size = PSIZE_UBOOT,
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.offset = 0x000000,
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.mask_flags = MTD_CAP_ROM
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}, {
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.name = "initramfs(spi)",
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.size = PSIZE_INITRAMFS,
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.offset = PSIZE_UBOOT
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}, {
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.name = "opt(spi)",
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.size = FLASH_SIZE - (PSIZE_UBOOT + PSIZE_INITRAMFS),
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.offset = PSIZE_UBOOT + PSIZE_INITRAMFS,
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}
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};
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static struct flash_platform_data bfin_spi_flash_data = {
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.name = "m25p80",
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.parts = bfin_spi_flash_partitions,
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.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
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.type = "m25p64",
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};
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/* SPI flash chip (m25p64) */
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static struct bfin5xx_spi_chip spi_flash_chip_info = {
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.enable_dma = 0, /* use dma transfer with this chip*/
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};
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#endif
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#if IS_ENABLED(CONFIG_MMC_SPI)
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static struct bfin5xx_spi_chip mmc_spi_chip_info = {
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.enable_dma = 0,
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};
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#endif
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static struct spi_board_info bfin_spi_board_info[] __initdata = {
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#if IS_ENABLED(CONFIG_MTD_M25P80)
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{
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/* the modalias must be the same as spi device driver name */
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.modalias = "m25p80", /* Name of spi_driver for this device */
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.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
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.bus_num = 0, /* Framework bus number */
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.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
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.platform_data = &bfin_spi_flash_data,
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.controller_data = &spi_flash_chip_info,
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.mode = SPI_MODE_3,
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},
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#endif
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#if IS_ENABLED(CONFIG_MMC_SPI)
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{
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.modalias = "mmc_spi",
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.max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
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.bus_num = 0,
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.chip_select = 5,
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.controller_data = &mmc_spi_chip_info,
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.mode = SPI_MODE_3,
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},
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#endif
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};
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/* SPI controller data */
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static struct bfin5xx_spi_master bfin_spi0_info = {
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.num_chipselect = 8,
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.enable_dma = 1, /* master has the ability to do dma transfer */
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};
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/* SPI (0) */
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static struct resource bfin_spi0_resource[] = {
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[0] = {
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.start = SPI0_REGBASE,
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.end = SPI0_REGBASE + 0xFF,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = CH_SPI,
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.end = CH_SPI,
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.flags = IORESOURCE_DMA,
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},
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[2] = {
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.start = IRQ_SPI,
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.end = IRQ_SPI,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device bfin_spi0_device = {
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.name = "bfin-spi",
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.id = 0, /* Bus number */
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.num_resources = ARRAY_SIZE(bfin_spi0_resource),
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.resource = bfin_spi0_resource,
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.dev = {
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.platform_data = &bfin_spi0_info, /* Passed to driver */
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},
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};
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#endif /* spi master and devices */
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#if IS_ENABLED(CONFIG_SERIAL_BFIN)
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#ifdef CONFIG_SERIAL_BFIN_UART0
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static struct resource bfin_uart0_resources[] = {
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{
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.start = UART0_THR,
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.end = UART0_GCTL+2,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_UART0_TX,
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.end = IRQ_UART0_TX,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = IRQ_UART0_RX,
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.end = IRQ_UART0_RX,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = IRQ_UART0_ERROR,
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.end = IRQ_UART0_ERROR,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = CH_UART0_TX,
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.end = CH_UART0_TX,
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.flags = IORESOURCE_DMA,
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},
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{
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.start = CH_UART0_RX,
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.end = CH_UART0_RX,
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.flags = IORESOURCE_DMA,
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},
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};
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static unsigned short bfin_uart0_peripherals[] = {
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P_UART0_TX, P_UART0_RX, 0
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};
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static struct platform_device bfin_uart0_device = {
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.name = "bfin-uart",
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.id = 0,
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.num_resources = ARRAY_SIZE(bfin_uart0_resources),
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.resource = bfin_uart0_resources,
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.dev = {
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.platform_data = &bfin_uart0_peripherals, /* Passed to driver */
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},
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};
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#endif
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#ifdef CONFIG_SERIAL_BFIN_UART1
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static struct resource bfin_uart1_resources[] = {
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{
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.start = UART1_THR,
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.end = UART1_GCTL+2,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_UART1_TX,
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.end = IRQ_UART1_TX,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = IRQ_UART1_RX,
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.end = IRQ_UART1_RX,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = IRQ_UART1_ERROR,
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.end = IRQ_UART1_ERROR,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = CH_UART1_TX,
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.end = CH_UART1_TX,
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.flags = IORESOURCE_DMA,
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},
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{
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.start = CH_UART1_RX,
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.end = CH_UART1_RX,
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.flags = IORESOURCE_DMA,
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},
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};
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static unsigned short bfin_uart1_peripherals[] = {
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P_UART1_TX, P_UART1_RX, 0
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};
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static struct platform_device bfin_uart1_device = {
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.name = "bfin-uart",
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.id = 1,
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.num_resources = ARRAY_SIZE(bfin_uart1_resources),
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.resource = bfin_uart1_resources,
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.dev = {
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.platform_data = &bfin_uart1_peripherals, /* Passed to driver */
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},
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};
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#endif
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#endif
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#if IS_ENABLED(CONFIG_BFIN_SIR)
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#ifdef CONFIG_BFIN_SIR0
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static struct resource bfin_sir0_resources[] = {
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{
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.start = 0xFFC00400,
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.end = 0xFFC004FF,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_UART0_RX,
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.end = IRQ_UART0_RX+1,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = CH_UART0_RX,
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.end = CH_UART0_RX+1,
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.flags = IORESOURCE_DMA,
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},
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};
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static struct platform_device bfin_sir0_device = {
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.name = "bfin_sir",
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.id = 0,
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.num_resources = ARRAY_SIZE(bfin_sir0_resources),
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.resource = bfin_sir0_resources,
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};
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#endif
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#ifdef CONFIG_BFIN_SIR1
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static struct resource bfin_sir1_resources[] = {
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{
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.start = 0xFFC02000,
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.end = 0xFFC020FF,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_UART1_RX,
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.end = IRQ_UART1_RX+1,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = CH_UART1_RX,
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.end = CH_UART1_RX+1,
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.flags = IORESOURCE_DMA,
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},
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};
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|
|
static struct platform_device bfin_sir1_device = {
|
||
|
|
.name = "bfin_sir",
|
||
|
|
.id = 1,
|
||
|
|
.num_resources = ARRAY_SIZE(bfin_sir1_resources),
|
||
|
|
.resource = bfin_sir1_resources,
|
||
|
|
};
|
||
|
|
#endif
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
|
||
|
|
static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
|
||
|
|
|
||
|
|
static struct resource bfin_twi0_resource[] = {
|
||
|
|
[0] = {
|
||
|
|
.start = TWI0_REGBASE,
|
||
|
|
.end = TWI0_REGBASE + 0xFF,
|
||
|
|
.flags = IORESOURCE_MEM,
|
||
|
|
},
|
||
|
|
[1] = {
|
||
|
|
.start = IRQ_TWI,
|
||
|
|
.end = IRQ_TWI,
|
||
|
|
.flags = IORESOURCE_IRQ,
|
||
|
|
},
|
||
|
|
};
|
||
|
|
|
||
|
|
static struct platform_device i2c_bfin_twi_device = {
|
||
|
|
.name = "i2c-bfin-twi",
|
||
|
|
.id = 0,
|
||
|
|
.num_resources = ARRAY_SIZE(bfin_twi0_resource),
|
||
|
|
.resource = bfin_twi0_resource,
|
||
|
|
.dev = {
|
||
|
|
.platform_data = &bfin_twi0_pins,
|
||
|
|
},
|
||
|
|
};
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
|
||
|
|
#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
|
||
|
|
static struct resource bfin_sport0_uart_resources[] = {
|
||
|
|
{
|
||
|
|
.start = SPORT0_TCR1,
|
||
|
|
.end = SPORT0_MRCS3+4,
|
||
|
|
.flags = IORESOURCE_MEM,
|
||
|
|
},
|
||
|
|
{
|
||
|
|
.start = IRQ_SPORT0_RX,
|
||
|
|
.end = IRQ_SPORT0_RX+1,
|
||
|
|
.flags = IORESOURCE_IRQ,
|
||
|
|
},
|
||
|
|
{
|
||
|
|
.start = IRQ_SPORT0_ERROR,
|
||
|
|
.end = IRQ_SPORT0_ERROR,
|
||
|
|
.flags = IORESOURCE_IRQ,
|
||
|
|
},
|
||
|
|
};
|
||
|
|
|
||
|
|
static unsigned short bfin_sport0_peripherals[] = {
|
||
|
|
P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
|
||
|
|
P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
|
||
|
|
};
|
||
|
|
|
||
|
|
static struct platform_device bfin_sport0_uart_device = {
|
||
|
|
.name = "bfin-sport-uart",
|
||
|
|
.id = 0,
|
||
|
|
.num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
|
||
|
|
.resource = bfin_sport0_uart_resources,
|
||
|
|
.dev = {
|
||
|
|
.platform_data = &bfin_sport0_peripherals, /* Passed to driver */
|
||
|
|
},
|
||
|
|
};
|
||
|
|
#endif
|
||
|
|
#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
|
||
|
|
static struct resource bfin_sport1_uart_resources[] = {
|
||
|
|
{
|
||
|
|
.start = SPORT1_TCR1,
|
||
|
|
.end = SPORT1_MRCS3+4,
|
||
|
|
.flags = IORESOURCE_MEM,
|
||
|
|
},
|
||
|
|
{
|
||
|
|
.start = IRQ_SPORT1_RX,
|
||
|
|
.end = IRQ_SPORT1_RX+1,
|
||
|
|
.flags = IORESOURCE_IRQ,
|
||
|
|
},
|
||
|
|
{
|
||
|
|
.start = IRQ_SPORT1_ERROR,
|
||
|
|
.end = IRQ_SPORT1_ERROR,
|
||
|
|
.flags = IORESOURCE_IRQ,
|
||
|
|
},
|
||
|
|
};
|
||
|
|
|
||
|
|
static unsigned short bfin_sport1_peripherals[] = {
|
||
|
|
P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
|
||
|
|
P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
|
||
|
|
};
|
||
|
|
|
||
|
|
static struct platform_device bfin_sport1_uart_device = {
|
||
|
|
.name = "bfin-sport-uart",
|
||
|
|
.id = 1,
|
||
|
|
.num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
|
||
|
|
.resource = bfin_sport1_uart_resources,
|
||
|
|
.dev = {
|
||
|
|
.platform_data = &bfin_sport1_peripherals, /* Passed to driver */
|
||
|
|
},
|
||
|
|
};
|
||
|
|
#endif
|
||
|
|
#endif
|
||
|
|
|
||
|
|
static struct platform_device *minotaur_devices[] __initdata = {
|
||
|
|
#if IS_ENABLED(CONFIG_BFIN_CFPCMCIA)
|
||
|
|
&bfin_pcmcia_cf_device,
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
|
||
|
|
&rtc_device,
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#if IS_ENABLED(CONFIG_BFIN_MAC)
|
||
|
|
&bfin_mii_bus,
|
||
|
|
&bfin_mac_device,
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#if IS_ENABLED(CONFIG_USB_NET2272)
|
||
|
|
&net2272_bfin_device,
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#if IS_ENABLED(CONFIG_SPI_BFIN5XX)
|
||
|
|
&bfin_spi0_device,
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#if IS_ENABLED(CONFIG_SERIAL_BFIN)
|
||
|
|
#ifdef CONFIG_SERIAL_BFIN_UART0
|
||
|
|
&bfin_uart0_device,
|
||
|
|
#endif
|
||
|
|
#ifdef CONFIG_SERIAL_BFIN_UART1
|
||
|
|
&bfin_uart1_device,
|
||
|
|
#endif
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#if IS_ENABLED(CONFIG_BFIN_SIR)
|
||
|
|
#ifdef CONFIG_BFIN_SIR0
|
||
|
|
&bfin_sir0_device,
|
||
|
|
#endif
|
||
|
|
#ifdef CONFIG_BFIN_SIR1
|
||
|
|
&bfin_sir1_device,
|
||
|
|
#endif
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
|
||
|
|
&i2c_bfin_twi_device,
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
|
||
|
|
#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
|
||
|
|
&bfin_sport0_uart_device,
|
||
|
|
#endif
|
||
|
|
#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
|
||
|
|
&bfin_sport1_uart_device,
|
||
|
|
#endif
|
||
|
|
#endif
|
||
|
|
|
||
|
|
};
|
||
|
|
|
||
|
|
static int __init minotaur_init(void)
|
||
|
|
{
|
||
|
|
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
||
|
|
platform_add_devices(minotaur_devices, ARRAY_SIZE(minotaur_devices));
|
||
|
|
#if IS_ENABLED(CONFIG_SPI_BFIN5XX)
|
||
|
|
spi_register_board_info(bfin_spi_board_info,
|
||
|
|
ARRAY_SIZE(bfin_spi_board_info));
|
||
|
|
#endif
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
arch_initcall(minotaur_init);
|
||
|
|
|
||
|
|
static struct platform_device *minotaur_early_devices[] __initdata = {
|
||
|
|
#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
|
||
|
|
#ifdef CONFIG_SERIAL_BFIN_UART0
|
||
|
|
&bfin_uart0_device,
|
||
|
|
#endif
|
||
|
|
#ifdef CONFIG_SERIAL_BFIN_UART1
|
||
|
|
&bfin_uart1_device,
|
||
|
|
#endif
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
|
||
|
|
#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
|
||
|
|
&bfin_sport0_uart_device,
|
||
|
|
#endif
|
||
|
|
#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
|
||
|
|
&bfin_sport1_uart_device,
|
||
|
|
#endif
|
||
|
|
#endif
|
||
|
|
};
|
||
|
|
|
||
|
|
void __init native_machine_early_platform_add_devices(void)
|
||
|
|
{
|
||
|
|
printk(KERN_INFO "register early platform devices\n");
|
||
|
|
early_platform_add_devices(minotaur_early_devices,
|
||
|
|
ARRAY_SIZE(minotaur_early_devices));
|
||
|
|
}
|
||
|
|
|
||
|
|
void native_machine_restart(char *cmd)
|
||
|
|
{
|
||
|
|
/* workaround reboot hang when booting from SPI */
|
||
|
|
if ((bfin_read_SYSCR() & 0x7) == 0x3)
|
||
|
|
bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
|
||
|
|
}
|