230 lines
4.9 KiB
ArmAsm
230 lines
4.9 KiB
ArmAsm
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/*
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* Common Blackfin startup code
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*
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* Copyright 2004-2008 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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#include <linux/linkage.h>
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#include <linux/init.h>
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#include <asm/blackfin.h>
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#include <asm/thread_info.h>
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#include <asm/trace.h>
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#include <asm/asm-offsets.h>
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__INIT
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ENTRY(__init_clear_bss)
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r2 = r2 - r1;
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cc = r2 == 0;
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if cc jump .L_bss_done;
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r2 >>= 2;
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p1 = r1;
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p2 = r2;
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lsetup (1f, 1f) lc0 = p2;
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1: [p1++] = r0;
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.L_bss_done:
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rts;
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ENDPROC(__init_clear_bss)
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ENTRY(__start)
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/* R0: argument of command line string, passed from uboot, save it */
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R7 = R0;
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/* Enable Cycle Counter and Nesting Of Interrupts */
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#ifdef CONFIG_BFIN_SCRATCH_REG_CYCLES
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R0 = SYSCFG_SNEN;
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#else
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R0 = SYSCFG_SNEN | SYSCFG_CCEN;
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#endif
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SYSCFG = R0;
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/* Optimization register tricks: keep a base value in the
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* reserved P registers so we use the load/store with an
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* offset syntax. R0 = [P5 + <constant>];
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* P5 - core MMR base
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* R6 - 0
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*/
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r6 = 0;
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p5.l = 0;
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p5.h = hi(COREMMR_BASE);
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/* Zero out registers required by Blackfin ABI */
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/* Disable circular buffers */
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L0 = r6;
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L1 = r6;
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L2 = r6;
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L3 = r6;
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/* Disable hardware loops in case we were started by 'go' */
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LC0 = r6;
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LC1 = r6;
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/*
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* Clear ITEST_COMMAND and DTEST_COMMAND registers,
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* Leaving these as non-zero can confuse the emulator
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*/
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[p5 + (DTEST_COMMAND - COREMMR_BASE)] = r6;
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[p5 + (ITEST_COMMAND - COREMMR_BASE)] = r6;
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CSYNC;
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trace_buffer_init(p0,r0);
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/* Turn off the icache */
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r1 = [p5 + (IMEM_CONTROL - COREMMR_BASE)];
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BITCLR (r1, ENICPLB_P);
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[p5 + (IMEM_CONTROL - COREMMR_BASE)] = r1;
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SSYNC;
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/* Turn off the dcache */
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r1 = [p5 + (DMEM_CONTROL - COREMMR_BASE)];
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BITCLR (r1, ENDCPLB_P);
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[p5 + (DMEM_CONTROL - COREMMR_BASE)] = r1;
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SSYNC;
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/* in case of double faults, save a few things */
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p1.l = _initial_pda;
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p1.h = _initial_pda;
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r4 = RETX;
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#ifdef CONFIG_DEBUG_DOUBLEFAULT
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/* Only save these if we are storing them,
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* This happens here, since L1 gets clobbered
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* below
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*/
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GET_PDA(p0, r0);
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r0 = [p0 + PDA_DF_RETX];
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r1 = [p0 + PDA_DF_DCPLB];
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r2 = [p0 + PDA_DF_ICPLB];
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r3 = [p0 + PDA_DF_SEQSTAT];
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[p1 + PDA_INIT_DF_RETX] = r0;
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[p1 + PDA_INIT_DF_DCPLB] = r1;
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[p1 + PDA_INIT_DF_ICPLB] = r2;
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[p1 + PDA_INIT_DF_SEQSTAT] = r3;
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#endif
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[p1 + PDA_INIT_RETX] = r4;
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/* Initialize stack pointer */
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sp.l = _init_thread_union + THREAD_SIZE;
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sp.h = _init_thread_union + THREAD_SIZE;
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fp = sp;
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usp = sp;
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#ifdef CONFIG_EARLY_PRINTK
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call _init_early_exception_vectors;
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r0 = (EVT_IVHW | EVT_IRPTEN | EVT_EVX | EVT_NMI | EVT_RST | EVT_EMU);
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sti r0;
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#endif
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r0 = r6;
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/* Zero out all of the fun bss regions */
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#if L1_DATA_A_LENGTH > 0
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r1.l = __sbss_l1;
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r1.h = __sbss_l1;
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r2.l = __ebss_l1;
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r2.h = __ebss_l1;
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call __init_clear_bss
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#endif
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#if L1_DATA_B_LENGTH > 0
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r1.l = __sbss_b_l1;
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r1.h = __sbss_b_l1;
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r2.l = __ebss_b_l1;
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r2.h = __ebss_b_l1;
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call __init_clear_bss
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#endif
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#if L2_LENGTH > 0
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r1.l = __sbss_l2;
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r1.h = __sbss_l2;
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r2.l = __ebss_l2;
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r2.h = __ebss_l2;
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call __init_clear_bss
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#endif
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r1.l = ___bss_start;
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r1.h = ___bss_start;
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r2.l = ___bss_stop;
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r2.h = ___bss_stop;
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call __init_clear_bss
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/* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */
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call _bfin_relocate_l1_mem;
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#ifdef CONFIG_ROMKERNEL
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call _bfin_relocate_xip_data;
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#endif
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#ifdef CONFIG_BFIN_KERNEL_CLOCK
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/* Only use on-chip scratch space for stack when absolutely required
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* to avoid Anomaly 05000227 ... we know the init_clocks() func only
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* uses L1 text and stack space and no other memory region.
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*/
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# define KERNEL_CLOCK_STACK (L1_SCRATCH_START + L1_SCRATCH_LENGTH - 12)
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sp.l = lo(KERNEL_CLOCK_STACK);
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sp.h = hi(KERNEL_CLOCK_STACK);
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call _init_clocks;
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sp = usp; /* usp hasn't been touched, so restore from there */
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#endif
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/* This section keeps the processor in supervisor mode
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* during kernel boot. Switches to user mode at end of boot.
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* See page 3-9 of Hardware Reference manual for documentation.
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*/
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/* EVT15 = _real_start */
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p1.l = _real_start;
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p1.h = _real_start;
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[p5 + (EVT15 - COREMMR_BASE)] = p1;
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csync;
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#ifdef CONFIG_EARLY_PRINTK
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r0 = (EVT_IVG15 | EVT_IVHW | EVT_IRPTEN | EVT_EVX | EVT_NMI | EVT_RST | EVT_EMU) (z);
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#else
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r0 = EVT_IVG15 (z);
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#endif
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sti r0;
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raise 15;
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#ifdef CONFIG_EARLY_PRINTK
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p0.l = _early_trap;
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p0.h = _early_trap;
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#else
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p0.l = .LWAIT_HERE;
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p0.h = .LWAIT_HERE;
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#endif
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reti = p0;
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#if ANOMALY_05000281
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nop; nop; nop;
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#endif
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rti;
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.LWAIT_HERE:
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jump .LWAIT_HERE;
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ENDPROC(__start)
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/* A little BF561 glue ... */
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#ifndef WDOG_CTL
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# define WDOG_CTL WDOGA_CTL
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#endif
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ENTRY(_real_start)
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/* Enable nested interrupts */
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[--sp] = reti;
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/* watchdog off for now */
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p0.l = lo(WDOG_CTL);
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p0.h = hi(WDOG_CTL);
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r0 = 0xAD6(z);
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w[p0] = r0;
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ssync;
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/* Pass the u-boot arguments to the global value command line */
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R0 = R7;
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call _cmdline_init;
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sp += -12 + 4; /* +4 is for reti loading above */
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call _init_pda
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sp += 12;
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jump.l _start_kernel;
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ENDPROC(_real_start)
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__FINIT
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