415 lines
9.7 KiB
C
415 lines
9.7 KiB
C
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/* io.h: FRV I/O operations
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*
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* Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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* This gets interesting when talking to the PCI bus - the CPU is in big endian
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* mode, the PCI bus is little endian and the hardware in the middle can do
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* byte swapping
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*/
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#ifndef _ASM_IO_H
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#define _ASM_IO_H
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#ifdef __KERNEL__
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#define ARCH_HAS_IOREMAP_WT
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#include <linux/types.h>
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#include <asm/virtconvert.h>
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#include <asm/string.h>
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#include <asm/mb-regs.h>
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#include <asm-generic/pci_iomap.h>
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#include <linux/delay.h>
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/*
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* swap functions are sometimes needed to interface little-endian hardware
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*/
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static inline unsigned short _swapw(unsigned short v)
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{
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return ((v << 8) | (v >> 8));
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}
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static inline unsigned long _swapl(unsigned long v)
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{
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return ((v << 24) | ((v & 0xff00) << 8) | ((v & 0xff0000) >> 8) | (v >> 24));
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}
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//#define __iormb() asm volatile("membar")
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//#define __iowmb() asm volatile("membar")
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static inline u8 __raw_readb(const volatile void __iomem *addr)
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{
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return __builtin_read8((volatile void __iomem *)addr);
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}
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static inline u16 __raw_readw(const volatile void __iomem *addr)
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{
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return __builtin_read16((volatile void __iomem *)addr);
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}
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static inline u32 __raw_readl(const volatile void __iomem *addr)
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{
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return __builtin_read32((volatile void __iomem *)addr);
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}
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#define __raw_writeb(datum, addr) __builtin_write8(addr, datum)
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#define __raw_writew(datum, addr) __builtin_write16(addr, datum)
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#define __raw_writel(datum, addr) __builtin_write32(addr, datum)
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static inline void io_outsb(unsigned int addr, const void *buf, int len)
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{
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unsigned long __ioaddr = (unsigned long) addr;
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const uint8_t *bp = buf;
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while (len--)
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__builtin_write8((volatile void __iomem *) __ioaddr, *bp++);
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}
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static inline void io_outsw(unsigned int addr, const void *buf, int len)
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{
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unsigned long __ioaddr = (unsigned long) addr;
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const uint16_t *bp = buf;
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while (len--)
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__builtin_write16((volatile void __iomem *) __ioaddr, (*bp++));
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}
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extern void __outsl_ns(unsigned int addr, const void *buf, int len);
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extern void __outsl_sw(unsigned int addr, const void *buf, int len);
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static inline void __outsl(unsigned int addr, const void *buf, int len, int swap)
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{
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unsigned long __ioaddr = (unsigned long) addr;
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if (!swap)
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__outsl_ns(__ioaddr, buf, len);
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else
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__outsl_sw(__ioaddr, buf, len);
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}
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static inline void io_insb(unsigned long addr, void *buf, int len)
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{
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uint8_t *bp = buf;
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while (len--)
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*bp++ = __builtin_read8((volatile void __iomem *) addr);
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}
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static inline void io_insw(unsigned long addr, void *buf, int len)
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{
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uint16_t *bp = buf;
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while (len--)
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*bp++ = __builtin_read16((volatile void __iomem *) addr);
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}
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extern void __insl_ns(unsigned long addr, void *buf, int len);
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extern void __insl_sw(unsigned long addr, void *buf, int len);
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static inline void __insl(unsigned long addr, void *buf, int len, int swap)
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{
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if (!swap)
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__insl_ns(addr, buf, len);
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else
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__insl_sw(addr, buf, len);
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}
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#define mmiowb() mb()
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/*
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* make the short names macros so specific devices
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* can override them as required
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*/
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static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count)
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{
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memset((void __force *) addr, val, count);
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}
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static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, int count)
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{
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memcpy(dst, (void __force *) src, count);
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}
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static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count)
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{
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memcpy((void __force *) dst, src, count);
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}
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static inline uint8_t inb(unsigned long addr)
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{
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return __builtin_read8((void __iomem *)addr);
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}
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static inline uint16_t inw(unsigned long addr)
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{
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uint16_t ret = __builtin_read16((void __iomem *)addr);
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if (__is_PCI_IO(addr))
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ret = _swapw(ret);
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return ret;
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}
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static inline uint32_t inl(unsigned long addr)
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{
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uint32_t ret = __builtin_read32((void __iomem *)addr);
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if (__is_PCI_IO(addr))
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ret = _swapl(ret);
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return ret;
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}
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static inline void outb(uint8_t datum, unsigned long addr)
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{
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__builtin_write8((void __iomem *)addr, datum);
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}
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static inline void outw(uint16_t datum, unsigned long addr)
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{
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if (__is_PCI_IO(addr))
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datum = _swapw(datum);
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__builtin_write16((void __iomem *)addr, datum);
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}
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static inline void outl(uint32_t datum, unsigned long addr)
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{
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if (__is_PCI_IO(addr))
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datum = _swapl(datum);
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__builtin_write32((void __iomem *)addr, datum);
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}
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#define inb_p(addr) inb(addr)
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#define inw_p(addr) inw(addr)
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#define inl_p(addr) inl(addr)
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#define outb_p(x,addr) outb(x,addr)
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#define outw_p(x,addr) outw(x,addr)
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#define outl_p(x,addr) outl(x,addr)
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#define outsb(a,b,l) io_outsb(a,b,l)
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#define outsw(a,b,l) io_outsw(a,b,l)
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#define outsl(a,b,l) __outsl(a,b,l,0)
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#define insb(a,b,l) io_insb(a,b,l)
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#define insw(a,b,l) io_insw(a,b,l)
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#define insl(a,b,l) __insl(a,b,l,0)
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#define IO_SPACE_LIMIT 0xffffffff
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static inline uint8_t readb(const volatile void __iomem *addr)
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{
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return __builtin_read8((__force void volatile __iomem *) addr);
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}
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static inline uint16_t readw(const volatile void __iomem *addr)
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{
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uint16_t ret = __builtin_read16((__force void volatile __iomem *)addr);
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if (__is_PCI_MEM(addr))
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ret = _swapw(ret);
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return ret;
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}
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static inline uint32_t readl(const volatile void __iomem *addr)
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{
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uint32_t ret = __builtin_read32((__force void volatile __iomem *)addr);
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if (__is_PCI_MEM(addr))
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ret = _swapl(ret);
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return ret;
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}
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#define readb_relaxed readb
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#define readw_relaxed readw
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#define readl_relaxed readl
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static inline void writeb(uint8_t datum, volatile void __iomem *addr)
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{
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__builtin_write8(addr, datum);
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if (__is_PCI_MEM(addr))
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__flush_PCI_writes();
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}
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static inline void writew(uint16_t datum, volatile void __iomem *addr)
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{
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if (__is_PCI_MEM(addr))
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datum = _swapw(datum);
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__builtin_write16(addr, datum);
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if (__is_PCI_MEM(addr))
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__flush_PCI_writes();
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}
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static inline void writel(uint32_t datum, volatile void __iomem *addr)
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{
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if (__is_PCI_MEM(addr))
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datum = _swapl(datum);
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__builtin_write32(addr, datum);
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if (__is_PCI_MEM(addr))
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__flush_PCI_writes();
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}
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#define writeb_relaxed writeb
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#define writew_relaxed writew
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#define writel_relaxed writel
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/* Values for nocacheflag and cmode */
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#define IOMAP_FULL_CACHING 0
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#define IOMAP_NOCACHE_SER 1
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#define IOMAP_NOCACHE_NONSER 2
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#define IOMAP_WRITETHROUGH 3
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extern void __iomem *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag);
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static inline void __iomem *ioremap(unsigned long physaddr, unsigned long size)
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{
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return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
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}
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static inline void __iomem *ioremap_nocache(unsigned long physaddr, unsigned long size)
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{
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return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
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}
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static inline void __iomem *ioremap_wt(unsigned long physaddr, unsigned long size)
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{
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return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);
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}
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static inline void __iomem *ioremap_fullcache(unsigned long physaddr, unsigned long size)
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{
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return __ioremap(physaddr, size, IOMAP_FULL_CACHING);
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}
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#define ioremap_wc ioremap_nocache
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#define ioremap_uc ioremap_nocache
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extern void iounmap(void volatile __iomem *addr);
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static inline void __iomem *ioport_map(unsigned long port, unsigned int nr)
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{
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return (void __iomem *) port;
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}
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static inline void ioport_unmap(void __iomem *p)
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{
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}
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static inline void flush_write_buffers(void)
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{
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__asm__ __volatile__ ("membar" : : :"memory");
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}
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/*
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* do appropriate I/O accesses for token type
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*/
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static inline unsigned int ioread8(void __iomem *p)
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{
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return __builtin_read8(p);
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}
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static inline unsigned int ioread16(void __iomem *p)
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{
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uint16_t ret = __builtin_read16(p);
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if (__is_PCI_addr(p))
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ret = _swapw(ret);
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return ret;
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}
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static inline unsigned int ioread32(void __iomem *p)
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{
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uint32_t ret = __builtin_read32(p);
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if (__is_PCI_addr(p))
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ret = _swapl(ret);
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return ret;
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}
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static inline void iowrite8(u8 val, void __iomem *p)
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{
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__builtin_write8(p, val);
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if (__is_PCI_MEM(p))
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__flush_PCI_writes();
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}
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static inline void iowrite16(u16 val, void __iomem *p)
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{
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if (__is_PCI_addr(p))
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val = _swapw(val);
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__builtin_write16(p, val);
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if (__is_PCI_MEM(p))
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__flush_PCI_writes();
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}
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static inline void iowrite32(u32 val, void __iomem *p)
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{
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if (__is_PCI_addr(p))
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val = _swapl(val);
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__builtin_write32(p, val);
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if (__is_PCI_MEM(p))
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__flush_PCI_writes();
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}
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#define ioread16be(addr) be16_to_cpu(ioread16(addr))
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#define ioread32be(addr) be32_to_cpu(ioread32(addr))
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#define iowrite16be(v, addr) iowrite16(cpu_to_be16(v), (addr))
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#define iowrite32be(v, addr) iowrite32(cpu_to_be32(v), (addr))
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static inline void ioread8_rep(void __iomem *p, void *dst, unsigned long count)
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{
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io_insb((unsigned long) p, dst, count);
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}
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static inline void ioread16_rep(void __iomem *p, void *dst, unsigned long count)
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{
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io_insw((unsigned long) p, dst, count);
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}
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static inline void ioread32_rep(void __iomem *p, void *dst, unsigned long count)
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{
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__insl_ns((unsigned long) p, dst, count);
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}
|
||
|
|
|
||
|
|
static inline void iowrite8_rep(void __iomem *p, const void *src, unsigned long count)
|
||
|
|
{
|
||
|
|
io_outsb((unsigned long) p, src, count);
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline void iowrite16_rep(void __iomem *p, const void *src, unsigned long count)
|
||
|
|
{
|
||
|
|
io_outsw((unsigned long) p, src, count);
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline void iowrite32_rep(void __iomem *p, const void *src, unsigned long count)
|
||
|
|
{
|
||
|
|
__outsl_ns((unsigned long) p, src, count);
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
|
||
|
|
struct pci_dev;
|
||
|
|
static inline void pci_iounmap(struct pci_dev *dev, void __iomem *p)
|
||
|
|
{
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Convert a physical pointer to a virtual kernel pointer for /dev/mem
|
||
|
|
* access
|
||
|
|
*/
|
||
|
|
#define xlate_dev_mem_ptr(p) __va(p)
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Convert a virtual cached pointer to an uncached pointer
|
||
|
|
*/
|
||
|
|
#define xlate_dev_kmem_ptr(p) p
|
||
|
|
|
||
|
|
#endif /* __KERNEL__ */
|
||
|
|
|
||
|
|
#endif /* _ASM_IO_H */
|