69 lines
1.9 KiB
ArmAsm
69 lines
1.9 KiB
ArmAsm
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/* kernel atomic64 operations
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*
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* For an explanation of how atomic ops work in this arch, see:
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* Documentation/frv/atomic-ops.txt
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*
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* Copyright (C) 2009 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <asm/spr-regs.h>
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.text
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.balign 4
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###############################################################################
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#
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# uint64_t __xchg_64(uint64_t i, uint64_t *v)
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#
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###############################################################################
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.globl __xchg_64
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.type __xchg_64,@function
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__xchg_64:
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or.p gr8,gr8,gr4
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or gr9,gr9,gr5
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0:
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orcc gr0,gr0,gr0,icc3 /* set ICC3.Z */
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ckeq icc3,cc7
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ldd.p @(gr10,gr0),gr8 /* LDD.P/ORCR must be atomic */
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orcr cc7,cc7,cc3 /* set CC3 to true */
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cstd.p gr4,@(gr10,gr0) ,cc3,#1
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corcc gr29,gr29,gr0 ,cc3,#1 /* clear ICC3.Z if store happens */
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beq icc3,#0,0b
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bralr
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.size __xchg_64, .-__xchg_64
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###############################################################################
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#
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# uint64_t __cmpxchg_64(uint64_t test, uint64_t new, uint64_t *v)
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#
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###############################################################################
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.globl __cmpxchg_64
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.type __cmpxchg_64,@function
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__cmpxchg_64:
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or.p gr8,gr8,gr4
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or gr9,gr9,gr5
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0:
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orcc gr0,gr0,gr0,icc3 /* set ICC3.Z */
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ckeq icc3,cc7
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ldd.p @(gr12,gr0),gr8 /* LDD.P/ORCR must be atomic */
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orcr cc7,cc7,cc3
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subcc gr8,gr4,gr0,icc0
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subcc.p gr9,gr5,gr0,icc1
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bnelr icc0,#0
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bnelr icc1,#0
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cstd.p gr10,@(gr12,gr0) ,cc3,#1
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corcc gr29,gr29,gr0 ,cc3,#1 /* clear ICC3.Z if store happens */
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beq icc3,#0,0b
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bralr
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.size __cmpxchg_64, .-__cmpxchg_64
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