86 lines
1.8 KiB
C
86 lines
1.8 KiB
C
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2006 Ralf Baechle <ralf@linux-mips.org>
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*
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*/
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#ifndef __ASM_MACH_GENERIC_DMA_COHERENCE_H
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#define __ASM_MACH_GENERIC_DMA_COHERENCE_H
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struct device;
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static inline dma_addr_t plat_map_dma_mem(struct device *dev, void *addr,
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size_t size)
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{
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return virt_to_phys(addr);
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}
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static inline dma_addr_t plat_map_dma_mem_page(struct device *dev,
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struct page *page)
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{
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return page_to_phys(page);
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}
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static inline unsigned long plat_dma_addr_to_phys(struct device *dev,
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dma_addr_t dma_addr)
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{
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return dma_addr;
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}
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static inline void plat_unmap_dma_mem(struct device *dev, dma_addr_t dma_addr,
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size_t size, enum dma_data_direction direction)
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{
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}
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static inline int plat_dma_supported(struct device *dev, u64 mask)
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{
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/*
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* we fall back to GFP_DMA when the mask isn't all 1s,
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* so we can't guarantee allocations that must be
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* within a tighter range than GFP_DMA..
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*/
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if (mask < DMA_BIT_MASK(24))
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return 0;
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return 1;
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}
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static inline int plat_device_is_coherent(struct device *dev)
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{
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#ifdef CONFIG_DMA_PERDEV_COHERENT
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return dev->archdata.dma_coherent;
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#else
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switch (coherentio) {
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default:
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case IO_COHERENCE_DEFAULT:
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return hw_coherentio;
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case IO_COHERENCE_ENABLED:
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return 1;
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case IO_COHERENCE_DISABLED:
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return 0;
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}
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#endif
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}
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#ifndef plat_post_dma_flush
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static inline void plat_post_dma_flush(struct device *dev)
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{
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}
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#endif
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#ifdef CONFIG_SWIOTLB
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static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
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{
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return paddr;
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}
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static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
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{
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return daddr;
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}
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#endif
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#endif /* __ASM_MACH_GENERIC_DMA_COHERENCE_H */
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