426 lines
9.5 KiB
Plaintext
426 lines
9.5 KiB
Plaintext
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/*
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* MPC8349E-mITX Device Tree Source
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*
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* Copyright 2006 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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/dts-v1/;
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/ {
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model = "MPC8349EMITX";
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compatible = "MPC8349EMITX", "MPC834xMITX", "MPC83xxMITX";
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#address-cells = <1>;
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#size-cells = <1>;
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aliases {
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ethernet0 = &enet0;
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ethernet1 = &enet1;
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serial0 = &serial0;
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serial1 = &serial1;
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pci0 = &pci0;
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pci1 = &pci1;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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PowerPC,8349@0 {
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device_type = "cpu";
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reg = <0x0>;
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d-cache-line-size = <32>;
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i-cache-line-size = <32>;
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d-cache-size = <32768>;
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i-cache-size = <32768>;
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timebase-frequency = <0>; // from bootloader
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bus-frequency = <0>; // from bootloader
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clock-frequency = <0>; // from bootloader
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};
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};
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memory {
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device_type = "memory";
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reg = <0x00000000 0x10000000>;
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};
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soc8349@e0000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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device_type = "soc";
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compatible = "simple-bus";
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ranges = <0x0 0xe0000000 0x00100000>;
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reg = <0xe0000000 0x00000200>;
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bus-frequency = <0>; // from bootloader
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wdt@200 {
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device_type = "watchdog";
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compatible = "mpc83xx_wdt";
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reg = <0x200 0x100>;
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};
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gpio1: gpio-controller@c00 {
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#gpio-cells = <2>;
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compatible = "fsl,mpc8349-gpio";
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reg = <0xc00 0x100>;
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interrupts = <74 0x8>;
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interrupt-parent = <&ipic>;
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gpio-controller;
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};
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gpio2: gpio-controller@d00 {
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#gpio-cells = <2>;
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compatible = "fsl,mpc8349-gpio";
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reg = <0xd00 0x100>;
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interrupts = <75 0x8>;
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interrupt-parent = <&ipic>;
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gpio-controller;
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};
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i2c@3000 {
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#address-cells = <1>;
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#size-cells = <0>;
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cell-index = <0>;
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compatible = "fsl-i2c";
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reg = <0x3000 0x100>;
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interrupts = <14 0x8>;
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interrupt-parent = <&ipic>;
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dfsrr;
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eeprom: at24@50 {
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compatible = "st,24c256";
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reg = <0x50>;
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};
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};
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i2c@3100 {
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#address-cells = <1>;
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#size-cells = <0>;
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cell-index = <1>;
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compatible = "fsl-i2c";
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reg = <0x3100 0x100>;
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interrupts = <15 0x8>;
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interrupt-parent = <&ipic>;
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dfsrr;
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rtc@68 {
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compatible = "dallas,ds1339";
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reg = <0x68>;
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interrupts = <18 0x8>;
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interrupt-parent = <&ipic>;
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};
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pcf1: iexp@38 {
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#gpio-cells = <2>;
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compatible = "ti,pcf8574a";
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reg = <0x38>;
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gpio-controller;
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};
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pcf2: iexp@39 {
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#gpio-cells = <2>;
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compatible = "ti,pcf8574a";
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reg = <0x39>;
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gpio-controller;
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};
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spd: at24@51 {
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compatible = "at24,spd";
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reg = <0x51>;
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};
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mcu_pio: mcu@a {
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#gpio-cells = <2>;
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compatible = "fsl,mc9s08qg8-mpc8349emitx",
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"fsl,mcu-mpc8349emitx";
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reg = <0x0a>;
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gpio-controller;
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};
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};
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spi@7000 {
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cell-index = <0>;
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compatible = "fsl,spi";
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reg = <0x7000 0x1000>;
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interrupts = <16 0x8>;
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interrupt-parent = <&ipic>;
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mode = "cpu";
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};
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dma@82a8 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
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reg = <0x82a8 4>;
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ranges = <0 0x8100 0x1a8>;
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interrupt-parent = <&ipic>;
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interrupts = <71 8>;
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cell-index = <0>;
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dma-channel@0 {
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compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
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reg = <0 0x80>;
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cell-index = <0>;
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interrupt-parent = <&ipic>;
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interrupts = <71 8>;
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};
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dma-channel@80 {
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compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
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reg = <0x80 0x80>;
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cell-index = <1>;
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interrupt-parent = <&ipic>;
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interrupts = <71 8>;
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};
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dma-channel@100 {
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compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
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reg = <0x100 0x80>;
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cell-index = <2>;
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interrupt-parent = <&ipic>;
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interrupts = <71 8>;
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};
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dma-channel@180 {
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compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
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reg = <0x180 0x28>;
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cell-index = <3>;
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interrupt-parent = <&ipic>;
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interrupts = <71 8>;
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};
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};
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usb@22000 {
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compatible = "fsl-usb2-mph";
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reg = <0x22000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupt-parent = <&ipic>;
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interrupts = <39 0x8>;
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phy_type = "ulpi";
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port0;
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};
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usb@23000 {
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compatible = "fsl-usb2-dr";
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reg = <0x23000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupt-parent = <&ipic>;
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interrupts = <38 0x8>;
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dr_mode = "peripheral";
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phy_type = "ulpi";
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};
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enet0: ethernet@24000 {
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#address-cells = <1>;
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#size-cells = <1>;
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cell-index = <0>;
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device_type = "network";
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model = "TSEC";
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compatible = "gianfar";
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reg = <0x24000 0x1000>;
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ranges = <0x0 0x24000 0x1000>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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interrupts = <32 0x8 33 0x8 34 0x8>;
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interrupt-parent = <&ipic>;
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tbi-handle = <&tbi0>;
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phy-handle = <&phy1c>;
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linux,network-index = <0>;
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mdio@520 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,gianfar-mdio";
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reg = <0x520 0x20>;
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/* Vitesse 8201 */
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phy1c: ethernet-phy@1c {
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interrupt-parent = <&ipic>;
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interrupts = <18 0x8>;
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reg = <0x1c>;
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};
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tbi0: tbi-phy@11 {
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reg = <0x11>;
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device_type = "tbi-phy";
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};
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};
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};
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enet1: ethernet@25000 {
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#address-cells = <1>;
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#size-cells = <1>;
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cell-index = <1>;
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device_type = "network";
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model = "TSEC";
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compatible = "gianfar";
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reg = <0x25000 0x1000>;
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ranges = <0x0 0x25000 0x1000>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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interrupts = <35 0x8 36 0x8 37 0x8>;
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interrupt-parent = <&ipic>;
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/* Vitesse 7385 isn't on the MDIO bus */
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fixed-link = <1 1 1000 0 0>;
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linux,network-index = <1>;
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tbi-handle = <&tbi1>;
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mdio@520 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,gianfar-tbi";
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reg = <0x520 0x20>;
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tbi1: tbi-phy@11 {
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reg = <0x11>;
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device_type = "tbi-phy";
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};
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};
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};
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serial0: serial@4500 {
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cell-index = <0>;
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device_type = "serial";
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compatible = "fsl,ns16550", "ns16550";
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reg = <0x4500 0x100>;
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clock-frequency = <0>; // from bootloader
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interrupts = <9 0x8>;
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interrupt-parent = <&ipic>;
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};
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serial1: serial@4600 {
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cell-index = <1>;
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device_type = "serial";
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compatible = "fsl,ns16550", "ns16550";
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reg = <0x4600 0x100>;
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clock-frequency = <0>; // from bootloader
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interrupts = <10 0x8>;
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interrupt-parent = <&ipic>;
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};
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crypto@30000 {
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compatible = "fsl,sec2.0";
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reg = <0x30000 0x10000>;
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interrupts = <11 0x8>;
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interrupt-parent = <&ipic>;
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fsl,num-channels = <4>;
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fsl,channel-fifo-len = <24>;
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fsl,exec-units-mask = <0x7e>;
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fsl,descriptor-types-mask = <0x01010ebf>;
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};
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ipic: pic@700 {
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <2>;
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reg = <0x700 0x100>;
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device_type = "ipic";
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};
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gpio-leds {
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compatible = "gpio-leds";
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green {
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label = "Green";
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gpios = <&pcf1 0 1>;
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linux,default-trigger = "heartbeat";
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};
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yellow {
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label = "Yellow";
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gpios = <&pcf1 1 1>;
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/* linux,default-trigger = "heartbeat"; */
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default-state = "on";
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};
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};
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};
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pci0: pci@e0008500 {
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interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
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interrupt-map = <
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/* IDSEL 0x10 - SATA */
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0x8000 0x0 0x0 0x1 &ipic 22 0x8 /* SATA_INTA */
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>;
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interrupt-parent = <&ipic>;
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interrupts = <66 0x8>;
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bus-range = <0x0 0x0>;
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ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
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0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
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0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>;
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clock-frequency = <66666666>;
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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reg = <0xe0008500 0x100 /* internal registers */
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0xe0008300 0x8>; /* config space access registers */
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compatible = "fsl,mpc8349-pci";
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device_type = "pci";
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};
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pci1: pci@e0008600 {
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interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
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interrupt-map = <
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/* IDSEL 0x0E - MiniPCI Slot */
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0x7000 0x0 0x0 0x1 &ipic 21 0x8 /* PCI_INTA */
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/* IDSEL 0x0F - PCI Slot */
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0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */
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0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */
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>;
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interrupt-parent = <&ipic>;
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interrupts = <67 0x8>;
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bus-range = <0x0 0x0>;
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ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
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0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
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0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>;
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clock-frequency = <66666666>;
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#interrupt-cells = <1>;
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#size-cells = <2>;
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||
|
|
#address-cells = <3>;
|
||
|
|
reg = <0xe0008600 0x100 /* internal registers */
|
||
|
|
0xe0008380 0x8>; /* config space access registers */
|
||
|
|
compatible = "fsl,mpc8349-pci";
|
||
|
|
device_type = "pci";
|
||
|
|
};
|
||
|
|
|
||
|
|
localbus@e0005000 {
|
||
|
|
#address-cells = <2>;
|
||
|
|
#size-cells = <1>;
|
||
|
|
compatible = "fsl,mpc8349e-localbus",
|
||
|
|
"fsl,pq2pro-localbus",
|
||
|
|
"simple-bus";
|
||
|
|
reg = <0xe0005000 0xd8>;
|
||
|
|
ranges = <0x0 0x0 0xfe000000 0x1000000 /* flash */
|
||
|
|
0x1 0x0 0xf8000000 0x20000 /* VSC 7385 */
|
||
|
|
0x2 0x0 0xf9000000 0x200000 /* exp slot */
|
||
|
|
0x3 0x0 0xf0000000 0x210>; /* CF slot */
|
||
|
|
|
||
|
|
flash@0,0 {
|
||
|
|
compatible = "cfi-flash";
|
||
|
|
reg = <0x0 0x0 0x800000>;
|
||
|
|
bank-width = <2>;
|
||
|
|
device-width = <1>;
|
||
|
|
};
|
||
|
|
|
||
|
|
flash@0,800000 {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <1>;
|
||
|
|
compatible = "cfi-flash";
|
||
|
|
reg = <0x0 0x800000 0x800000>;
|
||
|
|
bank-width = <2>;
|
||
|
|
device-width = <1>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pata@3,0 {
|
||
|
|
compatible = "fsl,mpc8349emitx-pata", "ata-generic";
|
||
|
|
reg = <0x3 0x0 0x10 0x3 0x20c 0x4>;
|
||
|
|
reg-shift = <1>;
|
||
|
|
pio-mode = <6>;
|
||
|
|
interrupts = <23 0x8>;
|
||
|
|
interrupt-parent = <&ipic>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|