439 lines
9.3 KiB
C
439 lines
9.3 KiB
C
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#ifndef _ASM_POWERPC_CMPXCHG_H_
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#define _ASM_POWERPC_CMPXCHG_H_
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#ifdef __KERNEL__
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#include <linux/compiler.h>
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#include <asm/synch.h>
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#include <asm/asm-compat.h>
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#include <linux/bug.h>
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/*
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* Atomic exchange
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*
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* Changes the memory location '*p' to be val and returns
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* the previous value stored there.
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*/
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static __always_inline unsigned long
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__xchg_u32_local(volatile void *p, unsigned long val)
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{
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unsigned long prev;
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__asm__ __volatile__(
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"1: lwarx %0,0,%2 \n"
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PPC405_ERR77(0,%2)
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" stwcx. %3,0,%2 \n\
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bne- 1b"
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: "=&r" (prev), "+m" (*(volatile unsigned int *)p)
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: "r" (p), "r" (val)
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: "cc", "memory");
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return prev;
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}
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static __always_inline unsigned long
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__xchg_u32_relaxed(u32 *p, unsigned long val)
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{
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unsigned long prev;
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__asm__ __volatile__(
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"1: lwarx %0,0,%2\n"
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PPC405_ERR77(0, %2)
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" stwcx. %3,0,%2\n"
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" bne- 1b"
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: "=&r" (prev), "+m" (*p)
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: "r" (p), "r" (val)
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: "cc");
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return prev;
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}
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#ifdef CONFIG_PPC64
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static __always_inline unsigned long
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__xchg_u64_local(volatile void *p, unsigned long val)
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{
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unsigned long prev;
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__asm__ __volatile__(
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"1: ldarx %0,0,%2 \n"
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PPC405_ERR77(0,%2)
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" stdcx. %3,0,%2 \n\
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bne- 1b"
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: "=&r" (prev), "+m" (*(volatile unsigned long *)p)
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: "r" (p), "r" (val)
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: "cc", "memory");
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return prev;
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}
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static __always_inline unsigned long
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__xchg_u64_relaxed(u64 *p, unsigned long val)
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{
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unsigned long prev;
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__asm__ __volatile__(
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"1: ldarx %0,0,%2\n"
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PPC405_ERR77(0, %2)
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" stdcx. %3,0,%2\n"
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" bne- 1b"
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: "=&r" (prev), "+m" (*p)
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: "r" (p), "r" (val)
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: "cc");
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return prev;
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}
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#endif
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static __always_inline unsigned long
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__xchg_local(volatile void *ptr, unsigned long x, unsigned int size)
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{
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switch (size) {
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case 4:
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return __xchg_u32_local(ptr, x);
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#ifdef CONFIG_PPC64
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case 8:
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return __xchg_u64_local(ptr, x);
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#endif
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}
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BUILD_BUG_ON_MSG(1, "Unsupported size for __xchg");
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return x;
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}
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static __always_inline unsigned long
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__xchg_relaxed(void *ptr, unsigned long x, unsigned int size)
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{
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switch (size) {
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case 4:
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return __xchg_u32_relaxed(ptr, x);
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#ifdef CONFIG_PPC64
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case 8:
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return __xchg_u64_relaxed(ptr, x);
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#endif
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}
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BUILD_BUG_ON_MSG(1, "Unsupported size for __xchg_local");
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return x;
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}
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#define xchg_local(ptr,x) \
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({ \
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__typeof__(*(ptr)) _x_ = (x); \
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(__typeof__(*(ptr))) __xchg_local((ptr), \
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(unsigned long)_x_, sizeof(*(ptr))); \
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})
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#define xchg_relaxed(ptr, x) \
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({ \
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__typeof__(*(ptr)) _x_ = (x); \
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(__typeof__(*(ptr))) __xchg_relaxed((ptr), \
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(unsigned long)_x_, sizeof(*(ptr))); \
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})
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/*
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* Compare and exchange - if *p == old, set it to new,
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* and return the old value of *p.
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*/
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static __always_inline unsigned long
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__cmpxchg_u32(volatile unsigned int *p, unsigned long old, unsigned long new)
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{
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unsigned int prev;
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__asm__ __volatile__ (
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PPC_ATOMIC_ENTRY_BARRIER
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"1: lwarx %0,0,%2 # __cmpxchg_u32\n\
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cmpw 0,%0,%3\n\
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bne- 2f\n"
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PPC405_ERR77(0,%2)
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" stwcx. %4,0,%2\n\
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bne- 1b"
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PPC_ATOMIC_EXIT_BARRIER
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"\n\
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2:"
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: "=&r" (prev), "+m" (*p)
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: "r" (p), "r" (old), "r" (new)
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: "cc", "memory");
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return prev;
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}
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static __always_inline unsigned long
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__cmpxchg_u32_local(volatile unsigned int *p, unsigned long old,
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unsigned long new)
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{
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unsigned int prev;
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__asm__ __volatile__ (
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"1: lwarx %0,0,%2 # __cmpxchg_u32\n\
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cmpw 0,%0,%3\n\
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bne- 2f\n"
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PPC405_ERR77(0,%2)
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" stwcx. %4,0,%2\n\
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bne- 1b"
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"\n\
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2:"
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: "=&r" (prev), "+m" (*p)
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: "r" (p), "r" (old), "r" (new)
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: "cc", "memory");
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return prev;
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}
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static __always_inline unsigned long
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__cmpxchg_u32_relaxed(u32 *p, unsigned long old, unsigned long new)
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{
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unsigned long prev;
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__asm__ __volatile__ (
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"1: lwarx %0,0,%2 # __cmpxchg_u32_relaxed\n"
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" cmpw 0,%0,%3\n"
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" bne- 2f\n"
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PPC405_ERR77(0, %2)
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" stwcx. %4,0,%2\n"
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" bne- 1b\n"
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"2:"
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: "=&r" (prev), "+m" (*p)
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: "r" (p), "r" (old), "r" (new)
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: "cc");
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return prev;
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}
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/*
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* cmpxchg family don't have order guarantee if cmp part fails, therefore we
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* can avoid superfluous barriers if we use assembly code to implement
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* cmpxchg() and cmpxchg_acquire(), however we don't do the similar for
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* cmpxchg_release() because that will result in putting a barrier in the
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* middle of a ll/sc loop, which is probably a bad idea. For example, this
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* might cause the conditional store more likely to fail.
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*/
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static __always_inline unsigned long
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__cmpxchg_u32_acquire(u32 *p, unsigned long old, unsigned long new)
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{
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unsigned long prev;
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__asm__ __volatile__ (
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"1: lwarx %0,0,%2 # __cmpxchg_u32_acquire\n"
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" cmpw 0,%0,%3\n"
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" bne- 2f\n"
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PPC405_ERR77(0, %2)
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" stwcx. %4,0,%2\n"
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" bne- 1b\n"
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PPC_ACQUIRE_BARRIER
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"\n"
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"2:"
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: "=&r" (prev), "+m" (*p)
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: "r" (p), "r" (old), "r" (new)
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: "cc", "memory");
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return prev;
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}
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#ifdef CONFIG_PPC64
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static __always_inline unsigned long
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__cmpxchg_u64(volatile unsigned long *p, unsigned long old, unsigned long new)
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{
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unsigned long prev;
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__asm__ __volatile__ (
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PPC_ATOMIC_ENTRY_BARRIER
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"1: ldarx %0,0,%2 # __cmpxchg_u64\n\
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cmpd 0,%0,%3\n\
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bne- 2f\n\
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stdcx. %4,0,%2\n\
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bne- 1b"
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PPC_ATOMIC_EXIT_BARRIER
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"\n\
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2:"
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: "=&r" (prev), "+m" (*p)
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: "r" (p), "r" (old), "r" (new)
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: "cc", "memory");
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return prev;
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}
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static __always_inline unsigned long
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__cmpxchg_u64_local(volatile unsigned long *p, unsigned long old,
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unsigned long new)
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{
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unsigned long prev;
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__asm__ __volatile__ (
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"1: ldarx %0,0,%2 # __cmpxchg_u64\n\
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cmpd 0,%0,%3\n\
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bne- 2f\n\
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stdcx. %4,0,%2\n\
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bne- 1b"
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"\n\
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2:"
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: "=&r" (prev), "+m" (*p)
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: "r" (p), "r" (old), "r" (new)
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: "cc", "memory");
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return prev;
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}
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static __always_inline unsigned long
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__cmpxchg_u64_relaxed(u64 *p, unsigned long old, unsigned long new)
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{
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unsigned long prev;
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__asm__ __volatile__ (
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"1: ldarx %0,0,%2 # __cmpxchg_u64_relaxed\n"
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" cmpd 0,%0,%3\n"
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" bne- 2f\n"
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" stdcx. %4,0,%2\n"
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" bne- 1b\n"
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"2:"
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: "=&r" (prev), "+m" (*p)
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: "r" (p), "r" (old), "r" (new)
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: "cc");
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return prev;
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}
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static __always_inline unsigned long
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__cmpxchg_u64_acquire(u64 *p, unsigned long old, unsigned long new)
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{
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unsigned long prev;
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__asm__ __volatile__ (
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"1: ldarx %0,0,%2 # __cmpxchg_u64_acquire\n"
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" cmpd 0,%0,%3\n"
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" bne- 2f\n"
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" stdcx. %4,0,%2\n"
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" bne- 1b\n"
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PPC_ACQUIRE_BARRIER
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"\n"
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"2:"
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: "=&r" (prev), "+m" (*p)
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: "r" (p), "r" (old), "r" (new)
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: "cc", "memory");
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return prev;
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}
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#endif
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static __always_inline unsigned long
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__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new,
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unsigned int size)
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{
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switch (size) {
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case 4:
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return __cmpxchg_u32(ptr, old, new);
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#ifdef CONFIG_PPC64
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case 8:
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return __cmpxchg_u64(ptr, old, new);
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#endif
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}
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BUILD_BUG_ON_MSG(1, "Unsupported size for __cmpxchg");
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return old;
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}
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static __always_inline unsigned long
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__cmpxchg_local(volatile void *ptr, unsigned long old, unsigned long new,
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unsigned int size)
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{
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switch (size) {
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case 4:
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return __cmpxchg_u32_local(ptr, old, new);
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#ifdef CONFIG_PPC64
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case 8:
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return __cmpxchg_u64_local(ptr, old, new);
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#endif
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}
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BUILD_BUG_ON_MSG(1, "Unsupported size for __cmpxchg_local");
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return old;
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}
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static __always_inline unsigned long
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__cmpxchg_relaxed(void *ptr, unsigned long old, unsigned long new,
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unsigned int size)
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{
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switch (size) {
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case 4:
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return __cmpxchg_u32_relaxed(ptr, old, new);
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#ifdef CONFIG_PPC64
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case 8:
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return __cmpxchg_u64_relaxed(ptr, old, new);
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#endif
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}
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BUILD_BUG_ON_MSG(1, "Unsupported size for __cmpxchg_relaxed");
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return old;
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}
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static __always_inline unsigned long
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__cmpxchg_acquire(void *ptr, unsigned long old, unsigned long new,
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unsigned int size)
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{
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switch (size) {
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case 4:
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return __cmpxchg_u32_acquire(ptr, old, new);
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#ifdef CONFIG_PPC64
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case 8:
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return __cmpxchg_u64_acquire(ptr, old, new);
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#endif
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}
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BUILD_BUG_ON_MSG(1, "Unsupported size for __cmpxchg_acquire");
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return old;
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}
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#define cmpxchg(ptr, o, n) \
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({ \
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__typeof__(*(ptr)) _o_ = (o); \
|
||
|
|
__typeof__(*(ptr)) _n_ = (n); \
|
||
|
|
(__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
|
||
|
|
(unsigned long)_n_, sizeof(*(ptr))); \
|
||
|
|
})
|
||
|
|
|
||
|
|
|
||
|
|
#define cmpxchg_local(ptr, o, n) \
|
||
|
|
({ \
|
||
|
|
__typeof__(*(ptr)) _o_ = (o); \
|
||
|
|
__typeof__(*(ptr)) _n_ = (n); \
|
||
|
|
(__typeof__(*(ptr))) __cmpxchg_local((ptr), (unsigned long)_o_, \
|
||
|
|
(unsigned long)_n_, sizeof(*(ptr))); \
|
||
|
|
})
|
||
|
|
|
||
|
|
#define cmpxchg_relaxed(ptr, o, n) \
|
||
|
|
({ \
|
||
|
|
__typeof__(*(ptr)) _o_ = (o); \
|
||
|
|
__typeof__(*(ptr)) _n_ = (n); \
|
||
|
|
(__typeof__(*(ptr))) __cmpxchg_relaxed((ptr), \
|
||
|
|
(unsigned long)_o_, (unsigned long)_n_, \
|
||
|
|
sizeof(*(ptr))); \
|
||
|
|
})
|
||
|
|
|
||
|
|
#define cmpxchg_acquire(ptr, o, n) \
|
||
|
|
({ \
|
||
|
|
__typeof__(*(ptr)) _o_ = (o); \
|
||
|
|
__typeof__(*(ptr)) _n_ = (n); \
|
||
|
|
(__typeof__(*(ptr))) __cmpxchg_acquire((ptr), \
|
||
|
|
(unsigned long)_o_, (unsigned long)_n_, \
|
||
|
|
sizeof(*(ptr))); \
|
||
|
|
})
|
||
|
|
#ifdef CONFIG_PPC64
|
||
|
|
#define cmpxchg64(ptr, o, n) \
|
||
|
|
({ \
|
||
|
|
BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
|
||
|
|
cmpxchg((ptr), (o), (n)); \
|
||
|
|
})
|
||
|
|
#define cmpxchg64_local(ptr, o, n) \
|
||
|
|
({ \
|
||
|
|
BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
|
||
|
|
cmpxchg_local((ptr), (o), (n)); \
|
||
|
|
})
|
||
|
|
#define cmpxchg64_relaxed(ptr, o, n) \
|
||
|
|
({ \
|
||
|
|
BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
|
||
|
|
cmpxchg_relaxed((ptr), (o), (n)); \
|
||
|
|
})
|
||
|
|
#define cmpxchg64_acquire(ptr, o, n) \
|
||
|
|
({ \
|
||
|
|
BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
|
||
|
|
cmpxchg_acquire((ptr), (o), (n)); \
|
||
|
|
})
|
||
|
|
#else
|
||
|
|
#include <asm-generic/cmpxchg-local.h>
|
||
|
|
#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#endif /* __KERNEL__ */
|
||
|
|
#endif /* _ASM_POWERPC_CMPXCHG_H_ */
|