319 lines
11 KiB
C
319 lines
11 KiB
C
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* Copyright 2012 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com>
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*/
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#include <linux/types.h>
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#include <linux/string.h>
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#include <linux/kvm.h>
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#include <linux/kvm_host.h>
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#include <linux/kernel.h>
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#include <asm/opal.h>
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#include <asm/mce.h>
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#include <asm/machdep.h>
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#include <asm/cputhreads.h>
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#include <asm/hmi.h>
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/* SRR1 bits for machine check on POWER7 */
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#define SRR1_MC_LDSTERR (1ul << (63-42))
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#define SRR1_MC_IFETCH_SH (63-45)
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#define SRR1_MC_IFETCH_MASK 0x7
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#define SRR1_MC_IFETCH_SLBPAR 2 /* SLB parity error */
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#define SRR1_MC_IFETCH_SLBMULTI 3 /* SLB multi-hit */
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#define SRR1_MC_IFETCH_SLBPARMULTI 4 /* SLB parity + multi-hit */
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#define SRR1_MC_IFETCH_TLBMULTI 5 /* I-TLB multi-hit */
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/* DSISR bits for machine check on POWER7 */
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#define DSISR_MC_DERAT_MULTI 0x800 /* D-ERAT multi-hit */
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#define DSISR_MC_TLB_MULTI 0x400 /* D-TLB multi-hit */
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#define DSISR_MC_SLB_PARITY 0x100 /* SLB parity error */
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#define DSISR_MC_SLB_MULTI 0x080 /* SLB multi-hit */
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#define DSISR_MC_SLB_PARMULTI 0x040 /* SLB parity + multi-hit */
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/* POWER7 SLB flush and reload */
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static void reload_slb(struct kvm_vcpu *vcpu)
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{
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struct slb_shadow *slb;
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unsigned long i, n;
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/* First clear out SLB */
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asm volatile("slbmte %0,%0; slbia" : : "r" (0));
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/* Do they have an SLB shadow buffer registered? */
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slb = vcpu->arch.slb_shadow.pinned_addr;
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if (!slb)
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return;
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/* Sanity check */
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n = min_t(u32, be32_to_cpu(slb->persistent), SLB_MIN_SIZE);
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if ((void *) &slb->save_area[n] > vcpu->arch.slb_shadow.pinned_end)
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return;
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/* Load up the SLB from that */
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for (i = 0; i < n; ++i) {
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unsigned long rb = be64_to_cpu(slb->save_area[i].esid);
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unsigned long rs = be64_to_cpu(slb->save_area[i].vsid);
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rb = (rb & ~0xFFFul) | i; /* insert entry number */
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asm volatile("slbmte %0,%1" : : "r" (rs), "r" (rb));
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}
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}
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/*
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* On POWER7, see if we can handle a machine check that occurred inside
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* the guest in real mode, without switching to the host partition.
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*
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* Returns: 0 => exit guest, 1 => deliver machine check to guest
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*/
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static long kvmppc_realmode_mc_power7(struct kvm_vcpu *vcpu)
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{
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unsigned long srr1 = vcpu->arch.shregs.msr;
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struct machine_check_event mce_evt;
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long handled = 1;
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if (srr1 & SRR1_MC_LDSTERR) {
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/* error on load/store */
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unsigned long dsisr = vcpu->arch.shregs.dsisr;
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if (dsisr & (DSISR_MC_SLB_PARMULTI | DSISR_MC_SLB_MULTI |
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DSISR_MC_SLB_PARITY | DSISR_MC_DERAT_MULTI)) {
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/* flush and reload SLB; flushes D-ERAT too */
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reload_slb(vcpu);
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dsisr &= ~(DSISR_MC_SLB_PARMULTI | DSISR_MC_SLB_MULTI |
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DSISR_MC_SLB_PARITY | DSISR_MC_DERAT_MULTI);
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}
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if (dsisr & DSISR_MC_TLB_MULTI) {
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if (cur_cpu_spec && cur_cpu_spec->flush_tlb)
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cur_cpu_spec->flush_tlb(TLB_INVAL_SCOPE_LPID);
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dsisr &= ~DSISR_MC_TLB_MULTI;
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}
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/* Any other errors we don't understand? */
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if (dsisr & 0xffffffffUL)
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handled = 0;
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}
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switch ((srr1 >> SRR1_MC_IFETCH_SH) & SRR1_MC_IFETCH_MASK) {
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case 0:
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break;
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case SRR1_MC_IFETCH_SLBPAR:
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case SRR1_MC_IFETCH_SLBMULTI:
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case SRR1_MC_IFETCH_SLBPARMULTI:
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reload_slb(vcpu);
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break;
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case SRR1_MC_IFETCH_TLBMULTI:
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if (cur_cpu_spec && cur_cpu_spec->flush_tlb)
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cur_cpu_spec->flush_tlb(TLB_INVAL_SCOPE_LPID);
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break;
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default:
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handled = 0;
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}
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/*
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* See if we have already handled the condition in the linux host.
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* We assume that if the condition is recovered then linux host
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* will have generated an error log event that we will pick
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* up and log later.
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* Don't release mce event now. We will queue up the event so that
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* we can log the MCE event info on host console.
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*/
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if (!get_mce_event(&mce_evt, MCE_EVENT_DONTRELEASE))
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goto out;
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if (mce_evt.version == MCE_V1 &&
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(mce_evt.severity == MCE_SEV_NO_ERROR ||
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mce_evt.disposition == MCE_DISPOSITION_RECOVERED))
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handled = 1;
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out:
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/*
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* We are now going enter guest either through machine check
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* interrupt (for unhandled errors) or will continue from
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* current HSRR0 (for handled errors) in guest. Hence
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* queue up the event so that we can log it from host console later.
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*/
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machine_check_queue_event();
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return handled;
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}
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long kvmppc_realmode_machine_check(struct kvm_vcpu *vcpu)
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{
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return kvmppc_realmode_mc_power7(vcpu);
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}
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/* Check if dynamic split is in force and return subcore size accordingly. */
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static inline int kvmppc_cur_subcore_size(void)
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{
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if (local_paca->kvm_hstate.kvm_split_mode)
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return local_paca->kvm_hstate.kvm_split_mode->subcore_size;
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return threads_per_subcore;
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}
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void kvmppc_subcore_enter_guest(void)
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{
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int thread_id, subcore_id;
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thread_id = cpu_thread_in_core(local_paca->paca_index);
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subcore_id = thread_id / kvmppc_cur_subcore_size();
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local_paca->sibling_subcore_state->in_guest[subcore_id] = 1;
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}
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void kvmppc_subcore_exit_guest(void)
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{
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int thread_id, subcore_id;
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thread_id = cpu_thread_in_core(local_paca->paca_index);
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subcore_id = thread_id / kvmppc_cur_subcore_size();
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local_paca->sibling_subcore_state->in_guest[subcore_id] = 0;
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}
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static bool kvmppc_tb_resync_required(void)
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{
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if (test_and_set_bit(CORE_TB_RESYNC_REQ_BIT,
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&local_paca->sibling_subcore_state->flags))
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return false;
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return true;
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}
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static void kvmppc_tb_resync_done(void)
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{
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clear_bit(CORE_TB_RESYNC_REQ_BIT,
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&local_paca->sibling_subcore_state->flags);
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}
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/*
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* kvmppc_realmode_hmi_handler() is called only by primary thread during
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* guest exit path.
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*
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* There are multiple reasons why HMI could occur, one of them is
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* Timebase (TB) error. If this HMI is due to TB error, then TB would
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* have been in stopped state. The opal hmi handler Will fix it and
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* restore the TB value with host timebase value. For HMI caused due
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* to non-TB errors, opal hmi handler will not touch/restore TB register
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* and hence there won't be any change in TB value.
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*
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* Since we are not sure about the cause of this HMI, we can't be sure
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* about the content of TB register whether it holds guest or host timebase
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* value. Hence the idea is to resync the TB on every HMI, so that we
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* know about the exact state of the TB value. Resync TB call will
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* restore TB to host timebase.
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*
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* Things to consider:
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* - On TB error, HMI interrupt is reported on all the threads of the core
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* that has encountered TB error irrespective of split-core mode.
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* - The very first thread on the core that get chance to fix TB error
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* would rsync the TB with local chipTOD value.
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* - The resync TB is a core level action i.e. it will sync all the TBs
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* in that core independent of split-core mode. This means if we trigger
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* TB sync from a thread from one subcore, it would affect TB values of
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* sibling subcores of the same core.
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*
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* All threads need to co-ordinate before making opal hmi handler.
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* All threads will use sibling_subcore_state->in_guest[] (shared by all
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* threads in the core) in paca which holds information about whether
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* sibling subcores are in Guest mode or host mode. The in_guest[] array
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* is of size MAX_SUBCORE_PER_CORE=4, indexed using subcore id to set/unset
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* subcore status. Only primary threads from each subcore is responsible
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* to set/unset its designated array element while entering/exiting the
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* guset.
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*
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* After invoking opal hmi handler call, one of the thread (of entire core)
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* will need to resync the TB. Bit 63 from subcore state bitmap flags
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* (sibling_subcore_state->flags) will be used to co-ordinate between
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* primary threads to decide who takes up the responsibility.
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*
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* This is what we do:
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* - Primary thread from each subcore tries to set resync required bit[63]
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* of paca->sibling_subcore_state->flags.
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* - The first primary thread that is able to set the flag takes the
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* responsibility of TB resync. (Let us call it as thread leader)
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* - All other threads which are in host will call
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* wait_for_subcore_guest_exit() and wait for in_guest[0-3] from
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* paca->sibling_subcore_state to get cleared.
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* - All the primary thread will clear its subcore status from subcore
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* state in_guest[] array respectively.
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* - Once all primary threads clear in_guest[0-3], all of them will invoke
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* opal hmi handler.
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* - Now all threads will wait for TB resync to complete by invoking
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* wait_for_tb_resync() except the thread leader.
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* - Thread leader will do a TB resync by invoking opal_resync_timebase()
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* call and the it will clear the resync required bit.
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* - All other threads will now come out of resync wait loop and proceed
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* with individual execution.
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* - On return of this function, primary thread will signal all
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* secondary threads to proceed.
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* - All secondary threads will eventually call opal hmi handler on
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* their exit path.
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*/
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long kvmppc_realmode_hmi_handler(void)
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{
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int ptid = local_paca->kvm_hstate.ptid;
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bool resync_req;
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/* This is only called on primary thread. */
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BUG_ON(ptid != 0);
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__this_cpu_inc(irq_stat.hmi_exceptions);
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/*
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* By now primary thread has already completed guest->host
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* partition switch but haven't signaled secondaries yet.
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* All the secondary threads on this subcore is waiting
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* for primary thread to signal them to go ahead.
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*
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* For threads from subcore which isn't in guest, they all will
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* wait until all other subcores on this core exit the guest.
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*
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* Now set the resync required bit. If you are the first to
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* set this bit then kvmppc_tb_resync_required() function will
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* return true. For rest all other subcores
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* kvmppc_tb_resync_required() will return false.
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*
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* If resync_req == true, then this thread is responsible to
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* initiate TB resync after hmi handler has completed.
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* All other threads on this core will wait until this thread
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* clears the resync required bit flag.
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*/
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resync_req = kvmppc_tb_resync_required();
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/* Reset the subcore status to indicate it has exited guest */
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kvmppc_subcore_exit_guest();
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/*
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* Wait for other subcores on this core to exit the guest.
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* All the primary threads and threads from subcore that are
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* not in guest will wait here until all subcores are out
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* of guest context.
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*/
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wait_for_subcore_guest_exit();
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/*
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* At this point we are sure that primary threads from each
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* subcore on this core have completed guest->host partition
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* switch. Now it is safe to call HMI handler.
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*/
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if (ppc_md.hmi_exception_early)
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ppc_md.hmi_exception_early(NULL);
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/*
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* Check if this thread is responsible to resync TB.
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* All other threads will wait until this thread completes the
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* TB resync.
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*/
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if (resync_req) {
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opal_resync_timebase();
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/* Reset TB resync req bit */
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kvmppc_tb_resync_done();
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} else {
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wait_for_tb_resync();
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}
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return 0;
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}
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