66 lines
1.9 KiB
C
66 lines
1.9 KiB
C
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#ifndef _ASM_X86_DISABLED_FEATURES_H
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#define _ASM_X86_DISABLED_FEATURES_H
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/* These features, although they might be available in a CPU
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* will not be used because the compile options to support
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* them are not present.
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*
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* This code allows them to be checked and disabled at
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* compile time without an explicit #ifdef. Use
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* cpu_feature_enabled().
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*/
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#ifdef CONFIG_X86_INTEL_MPX
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# define DISABLE_MPX 0
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#else
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# define DISABLE_MPX (1<<(X86_FEATURE_MPX & 31))
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#endif
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#ifdef CONFIG_X86_64
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# define DISABLE_VME (1<<(X86_FEATURE_VME & 31))
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# define DISABLE_K6_MTRR (1<<(X86_FEATURE_K6_MTRR & 31))
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# define DISABLE_CYRIX_ARR (1<<(X86_FEATURE_CYRIX_ARR & 31))
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# define DISABLE_CENTAUR_MCR (1<<(X86_FEATURE_CENTAUR_MCR & 31))
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# define DISABLE_PCID 0
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#else
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# define DISABLE_VME 0
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# define DISABLE_K6_MTRR 0
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# define DISABLE_CYRIX_ARR 0
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# define DISABLE_CENTAUR_MCR 0
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# define DISABLE_PCID (1<<(X86_FEATURE_PCID & 31))
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#endif /* CONFIG_X86_64 */
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#ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
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# define DISABLE_PKU 0
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# define DISABLE_OSPKE 0
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#else
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# define DISABLE_PKU (1<<(X86_FEATURE_PKU & 31))
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# define DISABLE_OSPKE (1<<(X86_FEATURE_OSPKE & 31))
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#endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */
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/*
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* Make sure to add features to the correct mask
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*/
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#define DISABLED_MASK0 (DISABLE_VME)
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#define DISABLED_MASK1 0
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#define DISABLED_MASK2 0
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#define DISABLED_MASK3 (DISABLE_CYRIX_ARR|DISABLE_CENTAUR_MCR|DISABLE_K6_MTRR)
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#define DISABLED_MASK4 (DISABLE_PCID)
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#define DISABLED_MASK5 0
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#define DISABLED_MASK6 0
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#define DISABLED_MASK7 0
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#define DISABLED_MASK8 0
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#define DISABLED_MASK9 (DISABLE_MPX)
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#define DISABLED_MASK10 0
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#define DISABLED_MASK11 0
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#define DISABLED_MASK12 0
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#define DISABLED_MASK13 0
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#define DISABLED_MASK14 0
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#define DISABLED_MASK15 0
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#define DISABLED_MASK16 (DISABLE_PKU|DISABLE_OSPKE)
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#define DISABLED_MASK17 0
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#define DISABLED_MASK18 0
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#define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 19)
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#endif /* _ASM_X86_DISABLED_FEATURES_H */
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