96 lines
2.4 KiB
C
96 lines
2.4 KiB
C
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/*
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* Copyright (C) 2016 Socionext Inc.
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* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/clk-provider.h>
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#include <linux/device.h>
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#include <linux/regmap.h>
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#include "clk-uniphier.h"
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struct uniphier_clk_mux {
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struct clk_hw hw;
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struct regmap *regmap;
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unsigned int reg;
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const unsigned int *masks;
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const unsigned int *vals;
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};
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#define to_uniphier_clk_mux(_hw) container_of(_hw, struct uniphier_clk_mux, hw)
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static int uniphier_clk_mux_set_parent(struct clk_hw *hw, u8 index)
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{
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struct uniphier_clk_mux *mux = to_uniphier_clk_mux(hw);
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return regmap_write_bits(mux->regmap, mux->reg, mux->masks[index],
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mux->vals[index]);
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}
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static u8 uniphier_clk_mux_get_parent(struct clk_hw *hw)
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{
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struct uniphier_clk_mux *mux = to_uniphier_clk_mux(hw);
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int num_parents = clk_hw_get_num_parents(hw);
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int ret;
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unsigned int val;
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u8 i;
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ret = regmap_read(mux->regmap, mux->reg, &val);
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if (ret)
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return ret;
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for (i = 0; i < num_parents; i++)
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if ((mux->masks[i] & val) == mux->vals[i])
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return i;
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return -EINVAL;
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}
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static const struct clk_ops uniphier_clk_mux_ops = {
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.determine_rate = __clk_mux_determine_rate,
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.set_parent = uniphier_clk_mux_set_parent,
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.get_parent = uniphier_clk_mux_get_parent,
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};
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struct clk_hw *uniphier_clk_register_mux(struct device *dev,
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struct regmap *regmap,
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const char *name,
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const struct uniphier_clk_mux_data *data)
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{
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struct uniphier_clk_mux *mux;
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struct clk_init_data init;
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int ret;
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mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL);
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if (!mux)
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return ERR_PTR(-ENOMEM);
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init.name = name;
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init.ops = &uniphier_clk_mux_ops;
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init.flags = CLK_SET_RATE_PARENT;
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init.parent_names = data->parent_names;
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init.num_parents = data->num_parents,
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mux->regmap = regmap;
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mux->reg = data->reg;
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mux->masks = data->masks;
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mux->vals = data->vals;
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mux->hw.init = &init;
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ret = devm_clk_hw_register(dev, &mux->hw);
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if (ret)
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return ERR_PTR(ret);
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return &mux->hw;
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}
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