129 lines
3.3 KiB
C
129 lines
3.3 KiB
C
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/*
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* Copyright (C) STMicroelectronics SA 2014
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* Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics.
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* License terms: GNU General Public License (GPL), version 2
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*/
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#ifndef _STI_HDMI_H_
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#define _STI_HDMI_H_
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#include <linux/hdmi.h>
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#include <linux/platform_device.h>
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#include <drm/drmP.h>
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#define HDMI_STA 0x0010
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#define HDMI_STA_DLL_LCK BIT(5)
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#define HDMI_STA_HOT_PLUG BIT(4)
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struct sti_hdmi;
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struct hdmi_phy_ops {
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bool (*start)(struct sti_hdmi *hdmi);
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void (*stop)(struct sti_hdmi *hdmi);
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};
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struct hdmi_audio_params {
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bool enabled;
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unsigned int sample_width;
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unsigned int sample_rate;
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struct hdmi_audio_infoframe cea;
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};
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/* values for the framing mode property */
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enum sti_hdmi_modes {
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HDMI_MODE_HDMI,
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HDMI_MODE_DVI,
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};
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static const struct drm_prop_enum_list hdmi_mode_names[] = {
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{ HDMI_MODE_HDMI, "hdmi" },
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{ HDMI_MODE_DVI, "dvi" },
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};
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#define DEFAULT_HDMI_MODE HDMI_MODE_HDMI
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static const struct drm_prop_enum_list colorspace_mode_names[] = {
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{ HDMI_COLORSPACE_RGB, "rgb" },
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{ HDMI_COLORSPACE_YUV422, "yuv422" },
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{ HDMI_COLORSPACE_YUV444, "yuv444" },
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};
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#define DEFAULT_COLORSPACE_MODE HDMI_COLORSPACE_RGB
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/**
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* STI hdmi structure
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*
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* @dev: driver device
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* @drm_dev: pointer to drm device
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* @mode: current display mode selected
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* @regs: hdmi register
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* @syscfg: syscfg register for pll rejection configuration
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* @clk_pix: hdmi pixel clock
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* @clk_tmds: hdmi tmds clock
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* @clk_phy: hdmi phy clock
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* @clk_audio: hdmi audio clock
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* @irq: hdmi interrupt number
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* @irq_status: interrupt status register
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* @phy_ops: phy start/stop operations
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* @enabled: true if hdmi is enabled else false
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* @hpd: hot plug detect status
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* @wait_event: wait event
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* @event_received: wait event status
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* @reset: reset control of the hdmi phy
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* @ddc_adapt: i2c ddc adapter
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* @colorspace: current colorspace selected
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* @hdmi_mode: select framing for HDMI or DVI
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* @audio_pdev: ASoC hdmi-codec platform device
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* @audio: hdmi audio parameters.
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* @drm_connector: hdmi connector
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*/
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struct sti_hdmi {
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struct device dev;
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struct drm_device *drm_dev;
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struct drm_display_mode mode;
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void __iomem *regs;
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void __iomem *syscfg;
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struct clk *clk_pix;
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struct clk *clk_tmds;
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struct clk *clk_phy;
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struct clk *clk_audio;
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int irq;
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u32 irq_status;
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struct hdmi_phy_ops *phy_ops;
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bool enabled;
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bool hpd;
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wait_queue_head_t wait_event;
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bool event_received;
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struct reset_control *reset;
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struct i2c_adapter *ddc_adapt;
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enum hdmi_colorspace colorspace;
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enum sti_hdmi_modes hdmi_mode;
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struct platform_device *audio_pdev;
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struct hdmi_audio_params audio;
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struct drm_connector *drm_connector;
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};
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u32 hdmi_read(struct sti_hdmi *hdmi, int offset);
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void hdmi_write(struct sti_hdmi *hdmi, u32 val, int offset);
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/**
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* hdmi phy config structure
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*
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* A pointer to an array of these structures is passed to a TMDS (HDMI) output
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* via the control interface to provide board and SoC specific
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* configurations of the HDMI PHY. Each entry in the array specifies a hardware
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* specific configuration for a given TMDS clock frequency range.
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*
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* @min_tmds_freq: Lower bound of TMDS clock frequency this entry applies to
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* @max_tmds_freq: Upper bound of TMDS clock frequency this entry applies to
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* @config: SoC specific register configuration
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*/
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struct hdmi_phy_config {
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u32 min_tmds_freq;
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u32 max_tmds_freq;
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u32 config[4];
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};
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#endif
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