278 lines
7.3 KiB
C
278 lines
7.3 KiB
C
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/*
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* Most ISHTP provider device and ISHTP logic declarations
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*
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* Copyright (c) 2003-2016, Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef _ISHTP_DEV_H_
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#define _ISHTP_DEV_H_
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#include <linux/types.h>
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#include <linux/spinlock.h>
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#include "bus.h"
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#include "hbm.h"
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#define IPC_PAYLOAD_SIZE 128
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#define ISHTP_RD_MSG_BUF_SIZE IPC_PAYLOAD_SIZE
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#define IPC_FULL_MSG_SIZE 132
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/* Number of messages to be held in ISR->BH FIFO */
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#define RD_INT_FIFO_SIZE 64
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/*
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* Number of IPC messages to be held in Tx FIFO, to be sent by ISR -
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* Tx complete interrupt or RX_COMPLETE handler
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*/
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#define IPC_TX_FIFO_SIZE 512
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/*
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* Number of Maximum ISHTP Clients
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*/
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#define ISHTP_CLIENTS_MAX 256
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/*
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* Number of File descriptors/handles
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* that can be opened to the driver.
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*
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* Limit to 255: 256 Total Clients
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* minus internal client for ISHTP Bus Messages
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*/
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#define ISHTP_MAX_OPEN_HANDLE_COUNT (ISHTP_CLIENTS_MAX - 1)
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/* Internal Clients Number */
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#define ISHTP_HOST_CLIENT_ID_ANY (-1)
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#define ISHTP_HBM_HOST_CLIENT_ID 0
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#define MAX_DMA_DELAY 20
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/* ISHTP device states */
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enum ishtp_dev_state {
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ISHTP_DEV_INITIALIZING = 0,
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ISHTP_DEV_INIT_CLIENTS,
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ISHTP_DEV_ENABLED,
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ISHTP_DEV_RESETTING,
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ISHTP_DEV_DISABLED,
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ISHTP_DEV_POWER_DOWN,
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ISHTP_DEV_POWER_UP
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};
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const char *ishtp_dev_state_str(int state);
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struct ishtp_cl;
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/**
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* struct ishtp_fw_client - representation of fw client
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*
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* @props - client properties
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* @client_id - fw client id
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*/
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struct ishtp_fw_client {
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struct ishtp_client_properties props;
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uint8_t client_id;
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};
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/**
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* struct ishtp_msg_data - ISHTP message data struct
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* @size: Size of data in the *data
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* @data: Pointer to data
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*/
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struct ishtp_msg_data {
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uint32_t size;
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unsigned char *data;
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};
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/*
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* struct ishtp_cl_rb - request block structure
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* @list: Link to list members
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* @cl: ISHTP client instance
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* @buffer: message header
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* @buf_idx: Index into buffer
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* @read_time: unused at this time
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*/
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struct ishtp_cl_rb {
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struct list_head list;
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struct ishtp_cl *cl;
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struct ishtp_msg_data buffer;
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unsigned long buf_idx;
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unsigned long read_time;
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};
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/*
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* Control info for IPC messages ISHTP/IPC sending FIFO -
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* list with inline data buffer
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* This structure will be filled with parameters submitted
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* by the caller glue layer
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* 'buf' may be pointing to the external buffer or to 'inline_data'
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* 'offset' will be initialized to 0 by submitting
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*
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* 'ipc_send_compl' is intended for use by clients that send fragmented
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* messages. When a fragment is sent down to IPC msg regs,
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* it will be called.
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* If it has more fragments to send, it will do it. With last fragment
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* it will send appropriate ISHTP "message-complete" flag.
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* It will remove the outstanding message
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* (mark outstanding buffer as available).
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* If counting flow control is in work and there are more flow control
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* credits, it can put the next client message queued in cl.
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* structure for IPC processing.
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*
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*/
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struct wr_msg_ctl_info {
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/* Will be called with 'ipc_send_compl_prm' as parameter */
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void (*ipc_send_compl)(void *);
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void *ipc_send_compl_prm;
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size_t length;
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struct list_head link;
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unsigned char inline_data[IPC_FULL_MSG_SIZE];
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};
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/*
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* The ISHTP layer talks to hardware IPC message using the following
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* callbacks
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*/
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struct ishtp_hw_ops {
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int (*hw_reset)(struct ishtp_device *dev);
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int (*ipc_reset)(struct ishtp_device *dev);
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uint32_t (*ipc_get_header)(struct ishtp_device *dev, int length,
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int busy);
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int (*write)(struct ishtp_device *dev,
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void (*ipc_send_compl)(void *), void *ipc_send_compl_prm,
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unsigned char *msg, int length);
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uint32_t (*ishtp_read_hdr)(const struct ishtp_device *dev);
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int (*ishtp_read)(struct ishtp_device *dev, unsigned char *buffer,
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unsigned long buffer_length);
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uint32_t (*get_fw_status)(struct ishtp_device *dev);
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void (*sync_fw_clock)(struct ishtp_device *dev);
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};
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/**
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* struct ishtp_device - ISHTP private device struct
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*/
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struct ishtp_device {
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struct device *devc; /* pointer to lowest device */
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struct pci_dev *pdev; /* PCI device to get device ids */
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/* waitq for waiting for suspend response */
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wait_queue_head_t suspend_wait;
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bool suspend_flag; /* Suspend is active */
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/* waitq for waiting for resume response */
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wait_queue_head_t resume_wait;
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bool resume_flag; /*Resume is active */
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/*
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* lock for the device, for everything that doesn't have
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* a dedicated spinlock
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*/
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spinlock_t device_lock;
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bool recvd_hw_ready;
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struct hbm_version version;
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int transfer_path; /* Choice of transfer path: IPC or DMA */
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/* ishtp device states */
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enum ishtp_dev_state dev_state;
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enum ishtp_hbm_state hbm_state;
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/* driver read queue */
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struct ishtp_cl_rb read_list;
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spinlock_t read_list_spinlock;
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/* list of ishtp_cl's */
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struct list_head cl_list;
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spinlock_t cl_list_lock;
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long open_handle_count;
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/* List of bus devices */
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struct list_head device_list;
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spinlock_t device_list_lock;
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/* waiting queues for receive message from FW */
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wait_queue_head_t wait_hw_ready;
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wait_queue_head_t wait_hbm_recvd_msg;
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/* FIFO for input messages for BH processing */
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unsigned char rd_msg_fifo[RD_INT_FIFO_SIZE * IPC_PAYLOAD_SIZE];
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unsigned int rd_msg_fifo_head, rd_msg_fifo_tail;
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spinlock_t rd_msg_spinlock;
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struct work_struct bh_hbm_work;
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/* IPC write queue */
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struct wr_msg_ctl_info wr_processing_list_head, wr_free_list_head;
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/* For both processing list and free list */
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spinlock_t wr_processing_spinlock;
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spinlock_t out_ipc_spinlock;
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struct ishtp_fw_client *fw_clients; /*Note:memory has to be allocated*/
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DECLARE_BITMAP(fw_clients_map, ISHTP_CLIENTS_MAX);
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DECLARE_BITMAP(host_clients_map, ISHTP_CLIENTS_MAX);
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uint8_t fw_clients_num;
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uint8_t fw_client_presentation_num;
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uint8_t fw_client_index;
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spinlock_t fw_clients_lock;
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/* TX DMA buffers and slots */
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int ishtp_host_dma_enabled;
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void *ishtp_host_dma_tx_buf;
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unsigned int ishtp_host_dma_tx_buf_size;
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uint64_t ishtp_host_dma_tx_buf_phys;
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int ishtp_dma_num_slots;
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/* map of 4k blocks in Tx dma buf: 0-free, 1-used */
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uint8_t *ishtp_dma_tx_map;
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spinlock_t ishtp_dma_tx_lock;
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/* RX DMA buffers and slots */
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void *ishtp_host_dma_rx_buf;
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unsigned int ishtp_host_dma_rx_buf_size;
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uint64_t ishtp_host_dma_rx_buf_phys;
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/* Dump to trace buffers if enabled*/
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void (*print_log)(struct ishtp_device *dev, char *format, ...);
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/* Debug stats */
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unsigned int ipc_rx_cnt;
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unsigned long long ipc_rx_bytes_cnt;
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unsigned int ipc_tx_cnt;
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unsigned long long ipc_tx_bytes_cnt;
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const struct ishtp_hw_ops *ops;
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size_t mtu;
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uint32_t ishtp_msg_hdr;
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char hw[0] __aligned(sizeof(void *));
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};
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static inline unsigned long ishtp_secs_to_jiffies(unsigned long sec)
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{
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return msecs_to_jiffies(sec * MSEC_PER_SEC);
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}
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/*
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* Register Access Function
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*/
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static inline int ish_ipc_reset(struct ishtp_device *dev)
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{
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return dev->ops->ipc_reset(dev);
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}
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static inline int ish_hw_reset(struct ishtp_device *dev)
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{
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return dev->ops->hw_reset(dev);
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}
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/* Exported function */
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void ishtp_device_init(struct ishtp_device *dev);
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int ishtp_start(struct ishtp_device *dev);
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#endif /*_ISHTP_DEV_H_*/
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