328 lines
9.0 KiB
C
328 lines
9.0 KiB
C
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/*
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* Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include <linux/platform_device.h>
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#include <linux/dma-mapping.h>
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#include <linux/dma-contiguous.h>
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#include <soc/tegra/chip-id.h>
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#include <linux/iommu.h>
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#include <soc/tegra/fuse.h>
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#include <asm/dma-iommu.h>
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#include <dt-bindings/memory/tegra-swgroup.h>
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#include <soc/tegra/memory-carveout.h>
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#include <linux/platform/tegra/common.h>
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#include <soc/tegra/common.h>
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phys_addr_t tegra_carveout_start;
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phys_addr_t tegra_carveout_size;
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phys_addr_t tegra_vpr_start;
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phys_addr_t tegra_vpr_size;
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bool tegra_vpr_resize;
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/* FIXME: Use DT reserved-memory node */
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phys_addr_t __weak tegra_fb_start, tegra_fb_size,
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tegra_fb2_start, tegra_fb2_size,
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tegra_fb3_start, tegra_fb3_size,
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tegra_fb4_start, tegra_fb4_size,
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tegra_bootloader_fb_start, tegra_bootloader_fb_size,
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tegra_bootloader_fb2_start, tegra_bootloader_fb2_size,
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tegra_bootloader_fb3_start, tegra_bootloader_fb3_size,
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tegra_bootloader_fb4_start, tegra_bootloader_fb4_size,
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tegra_bootloader_lut_start, tegra_bootloader_lut_size,
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tegra_bootloader_lut2_start, tegra_bootloader_lut2_size,
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tegra_bootloader_lut3_start, tegra_bootloader_lut3_size,
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tegra_bootloader_lut4_start, tegra_bootloader_lut4_size;
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static struct iommu_linear_map tegra_fb_linear_map[16]; /* Terminated with 0 */
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#define LINEAR_MAP_ADD(n) \
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do { \
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if (n##_start && n##_size) { \
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map[i].start = n##_start; \
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map[i++].size = n##_size; \
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} \
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} while (0)
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#if defined(CONFIG_DMA_CMA) && defined(CONFIG_TEGRA_NVMAP)
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static void carveout_linear_set(struct device *cma_dev)
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{
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struct dma_contiguous_stats stats;
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struct iommu_linear_map *map = &tegra_fb_linear_map[0];
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if (dma_get_contiguous_stats(cma_dev, &stats))
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return;
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/* get the free slot at end and add carveout entry */
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while (map && map->size)
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map++;
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map->start = stats.base;
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map->size = stats.size;
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}
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#endif
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static void cma_carveout_linear_set(void)
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{
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#if defined(CONFIG_DMA_CMA) && defined(CONFIG_TEGRA_NVMAP)
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if (tegra_vpr_resize) {
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carveout_linear_set(&tegra_generic_cma_dev);
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carveout_linear_set(&tegra_vpr_cma_dev);
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}
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#endif
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}
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void tegra_fb_linear_set(struct iommu_linear_map *map)
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{
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int i = 0;
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map = tegra_fb_linear_map;
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LINEAR_MAP_ADD(tegra_fb);
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LINEAR_MAP_ADD(tegra_fb2);
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LINEAR_MAP_ADD(tegra_fb3);
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LINEAR_MAP_ADD(tegra_fb4);
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LINEAR_MAP_ADD(tegra_bootloader_fb);
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LINEAR_MAP_ADD(tegra_bootloader_fb2);
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LINEAR_MAP_ADD(tegra_bootloader_fb3);
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LINEAR_MAP_ADD(tegra_bootloader_fb4);
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LINEAR_MAP_ADD(tegra_bootloader_lut);
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LINEAR_MAP_ADD(tegra_bootloader_lut2);
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LINEAR_MAP_ADD(tegra_bootloader_lut3);
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LINEAR_MAP_ADD(tegra_bootloader_lut4);
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#ifdef CONFIG_TEGRA_NVMAP
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if (!tegra_vpr_resize) {
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LINEAR_MAP_ADD(tegra_vpr);
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LINEAR_MAP_ADD(tegra_carveout);
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}
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#endif
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}
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EXPORT_SYMBOL(tegra_fb_linear_set);
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struct swgid_fixup {
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const char * const name;
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u64 swgids;
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struct iommu_linear_map *linear_map;
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};
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/*
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* FIXME: They should have a DT entry with swgroup IDs.
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*/
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static struct swgid_fixup tegra_swgid_fixup_t124[] = {
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{ .name = "nvavp", .swgids = TEGRA_SWGROUP_BIT(AVPC) |
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TEGRA_SWGROUP_BIT(A9AVP), },
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{ .name = "sdhci-tegra.2", .swgids = TEGRA_SWGROUP_BIT(SDMMC3A) },
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{ .name = "serial8250", .swgids = TEGRA_SWGROUP_BIT(PPCS), },
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{ .name = "dtv", .swgids = TEGRA_SWGROUP_BIT(PPCS), },
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{ .name = "snd-soc-dummy", .swgids = TEGRA_SWGROUP_BIT(PPCS), },
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{ .name = "spdif-dit", .swgids = TEGRA_SWGROUP_BIT(PPCS), },
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{ .name = "tegra12-se", .swgids = TEGRA_SWGROUP_BIT(PPCS), },
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{ .name = "tegra30-ahub", .swgids = TEGRA_SWGROUP_BIT(PPCS), },
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{ .name = "tegra30-dam", .swgids = TEGRA_SWGROUP_BIT(PPCS), },
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{ .name = "tegra30-hda", .swgids = TEGRA_SWGROUP_BIT(HDA), },
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{ .name = "tegra30-i2s", .swgids = TEGRA_SWGROUP_BIT(PPCS), },
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{ .name = "tegra30-spdif", .swgids = TEGRA_SWGROUP_BIT(PPCS), },
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{ .name = "tegra30-avp-audio", .swgids = TEGRA_SWGROUP_BIT(AVPC) |
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TEGRA_SWGROUP_BIT(A9AVP), },
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{ .name = "tegradc.0", .swgids = TEGRA_SWGROUP_BIT(DC) |
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TEGRA_SWGROUP_BIT(DC12),
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.linear_map = tegra_fb_linear_map, },
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{ .name = "tegradc.1", .swgids = TEGRA_SWGROUP_BIT(DCB),
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.linear_map = tegra_fb_linear_map, },
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{ .name = "tegra-ehci", .swgids = TEGRA_SWGROUP_BIT(PPCS), },
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{ .name = "tegra-fuse", .swgids = TEGRA_SWGROUP_BIT(PPCS), },
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/*
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* PPCS1 selection for USB2 needs AHB_ARBC register program
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* in warm boot and cold boot paths in BL as it needs
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* secure write.
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*/
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{ .name = "tegra-otg", .swgids = TEGRA_SWGROUP_BIT(PPCS1), },
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{ .name = "tegra-snd", .swgids = TEGRA_SWGROUP_BIT(PPCS), },
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{ .name = "tegra-udc", .swgids = TEGRA_SWGROUP_BIT(PPCS), },
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{ .name = "vic", .swgids = SWGIDS_ERROR_CODE, },
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{ .name = "vi", .swgids = TEGRA_SWGROUP_BIT(VI), },
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{ .name = "therm_est", .swgids = TEGRA_SWGROUP_BIT(PPCS), },
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{ .name = "tegra-xhci", .swgids = TEGRA_SWGROUP_BIT(XUSB_HOST), },
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{},
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};
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static struct swgid_fixup tegra_swgid_fixup_t210[] = {
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{
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.name = "bpmp",
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.swgids = TEGRA_SWGROUP_BIT(AVPC),
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},
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{ .name = "serial8250", .swgids = TEGRA_SWGROUP_BIT(PPCS) |
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TEGRA_SWGROUP_BIT(PPCS1) |
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TEGRA_SWGROUP_BIT(PPCS2), },
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{ .name = "snd-soc-dummy", .swgids = TEGRA_SWGROUP_BIT(PPCS) |
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TEGRA_SWGROUP_BIT(PPCS1) |
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TEGRA_SWGROUP_BIT(PPCS2), },
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{ .name = "spdif-dit", .swgids = TEGRA_SWGROUP_BIT(PPCS) |
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TEGRA_SWGROUP_BIT(PPCS1) |
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TEGRA_SWGROUP_BIT(PPCS2), },
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{ .name = "tegra21-se", .swgids = TEGRA_SWGROUP_BIT(PPCS) |
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TEGRA_SWGROUP_BIT(SE) |
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TEGRA_SWGROUP_BIT(SE1), },
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{ .name = "tegra30-hda", .swgids = TEGRA_SWGROUP_BIT(HDA), },
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{ .name = "tegra30-spdif", .swgids = TEGRA_SWGROUP_BIT(PPCS) |
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TEGRA_SWGROUP_BIT(PPCS1) |
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TEGRA_SWGROUP_BIT(PPCS2), },
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{ .name = "tegradc.0", .swgids = TEGRA_SWGROUP_BIT(DC) |
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TEGRA_SWGROUP_BIT(DC12), .linear_map = tegra_fb_linear_map, },
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{ .name = "tegradc.1", .swgids = TEGRA_SWGROUP_BIT(DCB),
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.linear_map = tegra_fb_linear_map, },
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{ .name = "54200000.dc", .swgids = TEGRA_SWGROUP_BIT(DC) |
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TEGRA_SWGROUP_BIT(DC12), .linear_map = tegra_fb_linear_map, },
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{ .name = "54240000.dc", .swgids = TEGRA_SWGROUP_BIT(DCB),
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.linear_map = tegra_fb_linear_map, },
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{ .name = "tegra-fuse", .swgids = TEGRA_SWGROUP_BIT(PPCS) |
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TEGRA_SWGROUP_BIT(PPCS1) |
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TEGRA_SWGROUP_BIT(PPCS2), },
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{ .name = "tegra-otg", .swgids = TEGRA_SWGROUP_BIT(PPCS) |
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TEGRA_SWGROUP_BIT(PPCS1) |
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TEGRA_SWGROUP_BIT(PPCS2), },
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{ .name = "tegra-se", .swgids = TEGRA_SWGROUP_BIT(PPCS) |
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TEGRA_SWGROUP_BIT(PPCS1) |
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TEGRA_SWGROUP_BIT(PPCS2), },
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{ .name = "tegra-udc", .swgids = TEGRA_SWGROUP_BIT(PPCS) |
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TEGRA_SWGROUP_BIT(PPCS1) |
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TEGRA_SWGROUP_BIT(PPCS2), },
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{},
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};
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u64 tegra_smmu_fixup_swgids(struct device *dev, struct iommu_linear_map **map)
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{
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const char *s;
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struct swgid_fixup *table;
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if (!dev)
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return SWGIDS_ERROR_CODE;
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switch (tegra_get_chip_id()) {
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case TEGRA124:
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case TEGRA132:
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table = tegra_swgid_fixup_t124;
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break;
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case TEGRA210:
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table = tegra_swgid_fixup_t210;
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break;
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default:
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return SWGIDS_ERROR_CODE;
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}
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while ((s = table->name) != NULL) {
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if (strncmp(s, dev_name(dev), strlen(s))) {
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table++;
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continue;
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}
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if (map)
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*map = table->linear_map;
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if (dev->of_node)
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break;
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pr_info("No Device Node present for smmu client: %s !!\n",
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dev_name(dev));
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break;
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}
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return table->name ? table->swgids : SWGIDS_ERROR_CODE;
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}
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EXPORT_SYMBOL(tegra_smmu_fixup_swgids);
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static int __init tegra_smmu_init(void)
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{
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tegra_fb_linear_set(NULL);
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cma_carveout_linear_set();
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return 0;
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}
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pure_initcall(tegra_smmu_init);
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struct iommu_linear_map_mapping {
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const char * const name;
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struct iommu_linear_map *map;
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};
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static struct iommu_linear_map_mapping t186_linear_map[] = {
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{
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.name = "15200000.nvdisplay",
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.map = tegra_fb_linear_map,
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},
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{
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.name = "15210000.nvdisplay",
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.map = tegra_fb_linear_map,
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},
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{
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.name = "15220000.nvdisplay",
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.map = tegra_fb_linear_map,
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},
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{},
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};
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static struct iommu_linear_map_mapping t194_linear_map[] = {
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{
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.name = "15200000.nvdisplay",
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.map = tegra_fb_linear_map,
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},
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{
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.name = "15210000.nvdisplay",
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.map = tegra_fb_linear_map,
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},
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{
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.name = "15220000.nvdisplay",
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.map = tegra_fb_linear_map,
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},
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{
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.name = "15230000.nvdisplay",
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.map = tegra_fb_linear_map,
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},
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{},
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};
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int iommu_get_linear_map(struct device *dev, struct iommu_linear_map **map)
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{
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const char *s;
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struct iommu_linear_map_mapping *table;
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if (!dev)
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return 0;
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switch (tegra_get_chipid()) {
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case TEGRA_CHIPID_TEGRA18:
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table = t186_linear_map;
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break;
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case TEGRA_CHIPID_TEGRA23:
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case TEGRA_CHIPID_TEGRA19:
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table = t194_linear_map;
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break;
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default:
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return 0;
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}
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while ((s = table->name) != NULL) {
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if (!strncmp(s, dev_name(dev), strlen(s))) {
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*map = table->map;
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return 1;
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}
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table++;
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}
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return 0;
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}
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EXPORT_SYMBOL(iommu_get_linear_map);
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