600 lines
16 KiB
C
600 lines
16 KiB
C
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/*
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* drivers/net/ethernet/mellanox/mlxsw/spectrum.h
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* Copyright (c) 2015 Mellanox Technologies. All rights reserved.
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* Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
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* Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
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* Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the names of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* Alternatively, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") version 2 as published by the Free
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* Software Foundation.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _MLXSW_SPECTRUM_H
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#define _MLXSW_SPECTRUM_H
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#include <linux/types.h>
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#include <linux/netdevice.h>
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#include <linux/rhashtable.h>
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#include <linux/bitops.h>
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#include <linux/if_vlan.h>
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#include <linux/list.h>
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#include <linux/dcbnl.h>
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#include <linux/in6.h>
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#include <linux/notifier.h>
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#include "port.h"
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#include "core.h"
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#define MLXSW_SP_VFID_BASE VLAN_N_VID
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#define MLXSW_SP_VFID_MAX 6656 /* Bridged VLAN interfaces */
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#define MLXSW_SP_RFID_BASE 15360
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#define MLXSW_SP_INVALID_RIF 0xffff
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#define MLXSW_SP_MID_MAX 7000
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#define MLXSW_SP_PORTS_PER_CLUSTER_MAX 4
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#define MLXSW_SP_LPM_TREE_MIN 2 /* trees 0 and 1 are reserved */
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#define MLXSW_SP_LPM_TREE_MAX 22
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#define MLXSW_SP_LPM_TREE_COUNT (MLXSW_SP_LPM_TREE_MAX - MLXSW_SP_LPM_TREE_MIN)
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#define MLXSW_SP_PORT_BASE_SPEED 25000 /* Mb/s */
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#define MLXSW_SP_BYTES_PER_CELL 96
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#define MLXSW_SP_BYTES_TO_CELLS(b) DIV_ROUND_UP(b, MLXSW_SP_BYTES_PER_CELL)
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#define MLXSW_SP_CELLS_TO_BYTES(c) (c * MLXSW_SP_BYTES_PER_CELL)
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#define MLXSW_SP_KVD_LINEAR_SIZE 65536 /* entries */
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#define MLXSW_SP_KVD_GRANULARITY 128
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/* Maximum delay buffer needed in case of PAUSE frames, in cells.
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* Assumes 100m cable and maximum MTU.
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*/
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#define MLXSW_SP_PAUSE_DELAY 612
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#define MLXSW_SP_CELL_FACTOR 2 /* 2 * cell_size / (IPG + cell_size + 1) */
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static inline u16 mlxsw_sp_pfc_delay_get(int mtu, u16 delay)
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{
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delay = MLXSW_SP_BYTES_TO_CELLS(DIV_ROUND_UP(delay, BITS_PER_BYTE));
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return MLXSW_SP_CELL_FACTOR * delay + MLXSW_SP_BYTES_TO_CELLS(mtu);
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}
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struct mlxsw_sp_port;
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struct mlxsw_sp_upper {
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struct net_device *dev;
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unsigned int ref_count;
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};
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struct mlxsw_sp_fid {
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void (*leave)(struct mlxsw_sp_port *mlxsw_sp_vport);
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struct list_head list;
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unsigned int ref_count;
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struct net_device *dev;
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struct mlxsw_sp_rif *r;
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u16 fid;
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};
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struct mlxsw_sp_rif {
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struct net_device *dev;
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unsigned int ref_count;
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struct mlxsw_sp_fid *f;
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unsigned char addr[ETH_ALEN];
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int mtu;
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u16 rif;
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};
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struct mlxsw_sp_mid {
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struct list_head list;
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unsigned char addr[ETH_ALEN];
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u16 fid;
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u16 mid;
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unsigned int ref_count;
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};
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static inline u16 mlxsw_sp_vfid_to_fid(u16 vfid)
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{
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return MLXSW_SP_VFID_BASE + vfid;
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}
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static inline u16 mlxsw_sp_fid_to_vfid(u16 fid)
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{
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return fid - MLXSW_SP_VFID_BASE;
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}
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static inline bool mlxsw_sp_fid_is_vfid(u16 fid)
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{
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return fid >= MLXSW_SP_VFID_BASE && fid < MLXSW_SP_RFID_BASE;
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}
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static inline bool mlxsw_sp_fid_is_rfid(u16 fid)
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{
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return fid >= MLXSW_SP_RFID_BASE;
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}
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static inline u16 mlxsw_sp_rif_sp_to_fid(u16 rif)
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{
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return MLXSW_SP_RFID_BASE + rif;
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}
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struct mlxsw_sp_sb_pr {
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enum mlxsw_reg_sbpr_mode mode;
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u32 size;
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};
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struct mlxsw_cp_sb_occ {
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u32 cur;
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u32 max;
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};
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struct mlxsw_sp_sb_cm {
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u32 min_buff;
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u32 max_buff;
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u8 pool;
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struct mlxsw_cp_sb_occ occ;
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};
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struct mlxsw_sp_sb_pm {
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u32 min_buff;
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u32 max_buff;
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struct mlxsw_cp_sb_occ occ;
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};
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#define MLXSW_SP_SB_POOL_COUNT 4
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#define MLXSW_SP_SB_TC_COUNT 8
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struct mlxsw_sp_sb {
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struct mlxsw_sp_sb_pr prs[2][MLXSW_SP_SB_POOL_COUNT];
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struct {
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struct mlxsw_sp_sb_cm cms[2][MLXSW_SP_SB_TC_COUNT];
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struct mlxsw_sp_sb_pm pms[2][MLXSW_SP_SB_POOL_COUNT];
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} ports[MLXSW_PORT_MAX_PORTS];
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};
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#define MLXSW_SP_PREFIX_COUNT (sizeof(struct in6_addr) * BITS_PER_BYTE)
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struct mlxsw_sp_prefix_usage {
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DECLARE_BITMAP(b, MLXSW_SP_PREFIX_COUNT);
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};
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enum mlxsw_sp_l3proto {
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MLXSW_SP_L3_PROTO_IPV4,
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MLXSW_SP_L3_PROTO_IPV6,
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};
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struct mlxsw_sp_lpm_tree {
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u8 id; /* tree ID */
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unsigned int ref_count;
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enum mlxsw_sp_l3proto proto;
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struct mlxsw_sp_prefix_usage prefix_usage;
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};
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struct mlxsw_sp_fib;
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struct mlxsw_sp_vr {
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u16 id; /* virtual router ID */
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bool used;
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enum mlxsw_sp_l3proto proto;
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u32 tb_id; /* kernel fib table id */
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struct mlxsw_sp_lpm_tree *lpm_tree;
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struct mlxsw_sp_fib *fib;
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};
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enum mlxsw_sp_span_type {
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MLXSW_SP_SPAN_EGRESS,
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MLXSW_SP_SPAN_INGRESS
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};
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struct mlxsw_sp_span_inspected_port {
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struct list_head list;
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enum mlxsw_sp_span_type type;
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u8 local_port;
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};
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struct mlxsw_sp_span_entry {
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u8 local_port;
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bool used;
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struct list_head bound_ports_list;
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int ref_count;
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int id;
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};
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enum mlxsw_sp_port_mall_action_type {
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MLXSW_SP_PORT_MALL_MIRROR,
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};
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struct mlxsw_sp_port_mall_mirror_tc_entry {
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u8 to_local_port;
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bool ingress;
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};
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struct mlxsw_sp_port_mall_tc_entry {
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struct list_head list;
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unsigned long cookie;
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enum mlxsw_sp_port_mall_action_type type;
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union {
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struct mlxsw_sp_port_mall_mirror_tc_entry mirror;
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};
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};
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struct mlxsw_sp_router {
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struct mlxsw_sp_lpm_tree lpm_trees[MLXSW_SP_LPM_TREE_COUNT];
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struct mlxsw_sp_vr *vrs;
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struct rhashtable neigh_ht;
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struct {
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struct delayed_work dw;
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unsigned long interval; /* ms */
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} neighs_update;
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struct delayed_work nexthop_probe_dw;
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#define MLXSW_SP_UNRESOLVED_NH_PROBE_INTERVAL 5000 /* ms */
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struct list_head nexthop_group_list;
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struct list_head nexthop_neighs_list;
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bool aborted;
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};
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struct mlxsw_sp {
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struct {
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struct list_head list;
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DECLARE_BITMAP(mapped, MLXSW_SP_VFID_MAX);
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} vfids;
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struct {
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struct list_head list;
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DECLARE_BITMAP(mapped, MLXSW_SP_MID_MAX);
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} br_mids;
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struct list_head fids; /* VLAN-aware bridge FIDs */
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struct mlxsw_sp_rif **rifs;
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struct mlxsw_sp_port **ports;
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struct mlxsw_core *core;
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const struct mlxsw_bus_info *bus_info;
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unsigned char base_mac[ETH_ALEN];
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struct {
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struct delayed_work dw;
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#define MLXSW_SP_DEFAULT_LEARNING_INTERVAL 100
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unsigned int interval; /* ms */
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} fdb_notify;
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#define MLXSW_SP_MIN_AGEING_TIME 10
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#define MLXSW_SP_MAX_AGEING_TIME 1000000
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#define MLXSW_SP_DEFAULT_AGEING_TIME 300
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u32 ageing_time;
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struct mlxsw_sp_upper master_bridge;
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struct mlxsw_sp_upper *lags;
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u8 port_to_module[MLXSW_PORT_MAX_PORTS];
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struct mlxsw_sp_sb sb;
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struct mlxsw_sp_router router;
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struct {
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DECLARE_BITMAP(usage, MLXSW_SP_KVD_LINEAR_SIZE);
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} kvdl;
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struct {
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struct mlxsw_sp_span_entry *entries;
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int entries_count;
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} span;
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struct notifier_block fib_nb;
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};
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static inline struct mlxsw_sp_upper *
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mlxsw_sp_lag_get(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
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{
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return &mlxsw_sp->lags[lag_id];
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}
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struct mlxsw_sp_port_pcpu_stats {
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u64 rx_packets;
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u64 rx_bytes;
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u64 tx_packets;
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u64 tx_bytes;
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struct u64_stats_sync syncp;
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u32 tx_dropped;
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};
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struct mlxsw_sp_port {
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struct mlxsw_core_port core_port; /* must be first */
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struct net_device *dev;
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struct mlxsw_sp_port_pcpu_stats __percpu *pcpu_stats;
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struct mlxsw_sp *mlxsw_sp;
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u8 local_port;
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u8 stp_state;
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u8 learning:1,
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learning_sync:1,
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uc_flood:1,
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bridged:1,
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lagged:1,
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split:1;
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u16 pvid;
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u16 lag_id;
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struct {
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struct list_head list;
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struct mlxsw_sp_fid *f;
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u16 vid;
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} vport;
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struct {
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u8 tx_pause:1,
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rx_pause:1,
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autoneg:1;
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} link;
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struct {
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struct ieee_ets *ets;
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struct ieee_maxrate *maxrate;
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struct ieee_pfc *pfc;
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} dcb;
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struct {
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u8 module;
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u8 width;
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u8 lane;
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} mapping;
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/* 802.1Q bridge VLANs */
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unsigned long *active_vlans;
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unsigned long *untagged_vlans;
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/* VLAN interfaces */
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struct list_head vports_list;
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/* TC handles */
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struct list_head mall_tc_list;
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struct {
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#define MLXSW_HW_STATS_UPDATE_TIME HZ
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struct rtnl_link_stats64 *cache;
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struct delayed_work update_dw;
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} hw_stats;
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};
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|
|
|
||
|
|
struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev);
|
||
|
|
void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port);
|
||
|
|
|
||
|
|
static inline bool
|
||
|
|
mlxsw_sp_port_is_pause_en(const struct mlxsw_sp_port *mlxsw_sp_port)
|
||
|
|
{
|
||
|
|
return mlxsw_sp_port->link.tx_pause || mlxsw_sp_port->link.rx_pause;
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline struct mlxsw_sp_port *
|
||
|
|
mlxsw_sp_port_lagged_get(struct mlxsw_sp *mlxsw_sp, u16 lag_id, u8 port_index)
|
||
|
|
{
|
||
|
|
struct mlxsw_sp_port *mlxsw_sp_port;
|
||
|
|
u8 local_port;
|
||
|
|
|
||
|
|
local_port = mlxsw_core_lag_mapping_get(mlxsw_sp->core,
|
||
|
|
lag_id, port_index);
|
||
|
|
mlxsw_sp_port = mlxsw_sp->ports[local_port];
|
||
|
|
return mlxsw_sp_port && mlxsw_sp_port->lagged ? mlxsw_sp_port : NULL;
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline u16
|
||
|
|
mlxsw_sp_vport_vid_get(const struct mlxsw_sp_port *mlxsw_sp_vport)
|
||
|
|
{
|
||
|
|
return mlxsw_sp_vport->vport.vid;
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline bool
|
||
|
|
mlxsw_sp_port_is_vport(const struct mlxsw_sp_port *mlxsw_sp_port)
|
||
|
|
{
|
||
|
|
u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_port);
|
||
|
|
|
||
|
|
return vid != 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline void mlxsw_sp_vport_fid_set(struct mlxsw_sp_port *mlxsw_sp_vport,
|
||
|
|
struct mlxsw_sp_fid *f)
|
||
|
|
{
|
||
|
|
mlxsw_sp_vport->vport.f = f;
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline struct mlxsw_sp_fid *
|
||
|
|
mlxsw_sp_vport_fid_get(const struct mlxsw_sp_port *mlxsw_sp_vport)
|
||
|
|
{
|
||
|
|
return mlxsw_sp_vport->vport.f;
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline struct net_device *
|
||
|
|
mlxsw_sp_vport_dev_get(const struct mlxsw_sp_port *mlxsw_sp_vport)
|
||
|
|
{
|
||
|
|
struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
|
||
|
|
|
||
|
|
return f ? f->dev : NULL;
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline struct mlxsw_sp_port *
|
||
|
|
mlxsw_sp_port_vport_find(const struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
|
||
|
|
{
|
||
|
|
struct mlxsw_sp_port *mlxsw_sp_vport;
|
||
|
|
|
||
|
|
list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
|
||
|
|
vport.list) {
|
||
|
|
if (mlxsw_sp_vport_vid_get(mlxsw_sp_vport) == vid)
|
||
|
|
return mlxsw_sp_vport;
|
||
|
|
}
|
||
|
|
|
||
|
|
return NULL;
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline struct mlxsw_sp_port *
|
||
|
|
mlxsw_sp_port_vport_find_by_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
|
||
|
|
u16 fid)
|
||
|
|
{
|
||
|
|
struct mlxsw_sp_port *mlxsw_sp_vport;
|
||
|
|
|
||
|
|
list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
|
||
|
|
vport.list) {
|
||
|
|
struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
|
||
|
|
|
||
|
|
if (f && f->fid == fid)
|
||
|
|
return mlxsw_sp_vport;
|
||
|
|
}
|
||
|
|
|
||
|
|
return NULL;
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline struct mlxsw_sp_fid *mlxsw_sp_fid_find(struct mlxsw_sp *mlxsw_sp,
|
||
|
|
u16 fid)
|
||
|
|
{
|
||
|
|
struct mlxsw_sp_fid *f;
|
||
|
|
|
||
|
|
list_for_each_entry(f, &mlxsw_sp->fids, list)
|
||
|
|
if (f->fid == fid)
|
||
|
|
return f;
|
||
|
|
|
||
|
|
return NULL;
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline struct mlxsw_sp_fid *
|
||
|
|
mlxsw_sp_vfid_find(const struct mlxsw_sp *mlxsw_sp,
|
||
|
|
const struct net_device *br_dev)
|
||
|
|
{
|
||
|
|
struct mlxsw_sp_fid *f;
|
||
|
|
|
||
|
|
list_for_each_entry(f, &mlxsw_sp->vfids.list, list)
|
||
|
|
if (f->dev == br_dev)
|
||
|
|
return f;
|
||
|
|
|
||
|
|
return NULL;
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline struct mlxsw_sp_rif *
|
||
|
|
mlxsw_sp_rif_find_by_dev(const struct mlxsw_sp *mlxsw_sp,
|
||
|
|
const struct net_device *dev)
|
||
|
|
{
|
||
|
|
struct mlxsw_resources *resources;
|
||
|
|
int i;
|
||
|
|
|
||
|
|
resources = mlxsw_core_resources_get(mlxsw_sp->core);
|
||
|
|
|
||
|
|
for (i = 0; i < resources->max_rif; i++)
|
||
|
|
if (mlxsw_sp->rifs[i] && mlxsw_sp->rifs[i]->dev == dev)
|
||
|
|
return mlxsw_sp->rifs[i];
|
||
|
|
|
||
|
|
return NULL;
|
||
|
|
}
|
||
|
|
|
||
|
|
enum mlxsw_sp_flood_table {
|
||
|
|
MLXSW_SP_FLOOD_TABLE_UC,
|
||
|
|
MLXSW_SP_FLOOD_TABLE_BM,
|
||
|
|
};
|
||
|
|
|
||
|
|
int mlxsw_sp_buffers_init(struct mlxsw_sp *mlxsw_sp);
|
||
|
|
void mlxsw_sp_buffers_fini(struct mlxsw_sp *mlxsw_sp);
|
||
|
|
int mlxsw_sp_port_buffers_init(struct mlxsw_sp_port *mlxsw_sp_port);
|
||
|
|
int mlxsw_sp_sb_pool_get(struct mlxsw_core *mlxsw_core,
|
||
|
|
unsigned int sb_index, u16 pool_index,
|
||
|
|
struct devlink_sb_pool_info *pool_info);
|
||
|
|
int mlxsw_sp_sb_pool_set(struct mlxsw_core *mlxsw_core,
|
||
|
|
unsigned int sb_index, u16 pool_index, u32 size,
|
||
|
|
enum devlink_sb_threshold_type threshold_type);
|
||
|
|
int mlxsw_sp_sb_port_pool_get(struct mlxsw_core_port *mlxsw_core_port,
|
||
|
|
unsigned int sb_index, u16 pool_index,
|
||
|
|
u32 *p_threshold);
|
||
|
|
int mlxsw_sp_sb_port_pool_set(struct mlxsw_core_port *mlxsw_core_port,
|
||
|
|
unsigned int sb_index, u16 pool_index,
|
||
|
|
u32 threshold);
|
||
|
|
int mlxsw_sp_sb_tc_pool_bind_get(struct mlxsw_core_port *mlxsw_core_port,
|
||
|
|
unsigned int sb_index, u16 tc_index,
|
||
|
|
enum devlink_sb_pool_type pool_type,
|
||
|
|
u16 *p_pool_index, u32 *p_threshold);
|
||
|
|
int mlxsw_sp_sb_tc_pool_bind_set(struct mlxsw_core_port *mlxsw_core_port,
|
||
|
|
unsigned int sb_index, u16 tc_index,
|
||
|
|
enum devlink_sb_pool_type pool_type,
|
||
|
|
u16 pool_index, u32 threshold);
|
||
|
|
int mlxsw_sp_sb_occ_snapshot(struct mlxsw_core *mlxsw_core,
|
||
|
|
unsigned int sb_index);
|
||
|
|
int mlxsw_sp_sb_occ_max_clear(struct mlxsw_core *mlxsw_core,
|
||
|
|
unsigned int sb_index);
|
||
|
|
int mlxsw_sp_sb_occ_port_pool_get(struct mlxsw_core_port *mlxsw_core_port,
|
||
|
|
unsigned int sb_index, u16 pool_index,
|
||
|
|
u32 *p_cur, u32 *p_max);
|
||
|
|
int mlxsw_sp_sb_occ_tc_port_bind_get(struct mlxsw_core_port *mlxsw_core_port,
|
||
|
|
unsigned int sb_index, u16 tc_index,
|
||
|
|
enum devlink_sb_pool_type pool_type,
|
||
|
|
u32 *p_cur, u32 *p_max);
|
||
|
|
|
||
|
|
int mlxsw_sp_switchdev_init(struct mlxsw_sp *mlxsw_sp);
|
||
|
|
void mlxsw_sp_switchdev_fini(struct mlxsw_sp *mlxsw_sp);
|
||
|
|
int mlxsw_sp_port_vlan_init(struct mlxsw_sp_port *mlxsw_sp_port);
|
||
|
|
void mlxsw_sp_port_switchdev_init(struct mlxsw_sp_port *mlxsw_sp_port);
|
||
|
|
void mlxsw_sp_port_switchdev_fini(struct mlxsw_sp_port *mlxsw_sp_port);
|
||
|
|
int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
|
||
|
|
enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
|
||
|
|
u16 vid);
|
||
|
|
int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
|
||
|
|
u16 vid_end, bool is_member, bool untagged);
|
||
|
|
int mlxsw_sp_vport_flood_set(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
|
||
|
|
bool set);
|
||
|
|
void mlxsw_sp_port_active_vlans_del(struct mlxsw_sp_port *mlxsw_sp_port);
|
||
|
|
int mlxsw_sp_port_pvid_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid);
|
||
|
|
int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid);
|
||
|
|
int mlxsw_sp_rif_fdb_op(struct mlxsw_sp *mlxsw_sp, const char *mac, u16 fid,
|
||
|
|
bool adding);
|
||
|
|
struct mlxsw_sp_fid *mlxsw_sp_fid_create(struct mlxsw_sp *mlxsw_sp, u16 fid);
|
||
|
|
void mlxsw_sp_fid_destroy(struct mlxsw_sp *mlxsw_sp, struct mlxsw_sp_fid *f);
|
||
|
|
void mlxsw_sp_rif_bridge_destroy(struct mlxsw_sp *mlxsw_sp,
|
||
|
|
struct mlxsw_sp_rif *r);
|
||
|
|
int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
|
||
|
|
enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
|
||
|
|
bool dwrr, u8 dwrr_weight);
|
||
|
|
int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
|
||
|
|
u8 switch_prio, u8 tclass);
|
||
|
|
int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
|
||
|
|
u8 *prio_tc, bool pause_en,
|
||
|
|
struct ieee_pfc *my_pfc);
|
||
|
|
int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
|
||
|
|
enum mlxsw_reg_qeec_hr hr, u8 index,
|
||
|
|
u8 next_index, u32 maxrate);
|
||
|
|
int __mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
|
||
|
|
u16 vid_begin, u16 vid_end,
|
||
|
|
bool learn_enable);
|
||
|
|
|
||
|
|
#ifdef CONFIG_MLXSW_SPECTRUM_DCB
|
||
|
|
|
||
|
|
int mlxsw_sp_port_dcb_init(struct mlxsw_sp_port *mlxsw_sp_port);
|
||
|
|
void mlxsw_sp_port_dcb_fini(struct mlxsw_sp_port *mlxsw_sp_port);
|
||
|
|
|
||
|
|
#else
|
||
|
|
|
||
|
|
static inline int mlxsw_sp_port_dcb_init(struct mlxsw_sp_port *mlxsw_sp_port)
|
||
|
|
{
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline void mlxsw_sp_port_dcb_fini(struct mlxsw_sp_port *mlxsw_sp_port)
|
||
|
|
{}
|
||
|
|
|
||
|
|
#endif
|
||
|
|
|
||
|
|
int mlxsw_sp_router_init(struct mlxsw_sp *mlxsw_sp);
|
||
|
|
void mlxsw_sp_router_fini(struct mlxsw_sp *mlxsw_sp);
|
||
|
|
int mlxsw_sp_router_neigh_construct(struct net_device *dev,
|
||
|
|
struct neighbour *n);
|
||
|
|
void mlxsw_sp_router_neigh_destroy(struct net_device *dev,
|
||
|
|
struct neighbour *n);
|
||
|
|
int mlxsw_sp_router_netevent_event(struct notifier_block *unused,
|
||
|
|
unsigned long event, void *ptr);
|
||
|
|
|
||
|
|
int mlxsw_sp_kvdl_alloc(struct mlxsw_sp *mlxsw_sp, unsigned int entry_count);
|
||
|
|
void mlxsw_sp_kvdl_free(struct mlxsw_sp *mlxsw_sp, int entry_index);
|
||
|
|
|
||
|
|
#endif
|