82 lines
2.6 KiB
C
82 lines
2.6 KiB
C
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/*
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* drivers/net/ethernet/mellanox/mlxsw/txheader.h
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* Copyright (c) 2015 Mellanox Technologies. All rights reserved.
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* Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
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* Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the names of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* Alternatively, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") version 2 as published by the Free
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* Software Foundation.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _MLXSW_TXHEADER_H
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#define _MLXSW_TXHEADER_H
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#define MLXSW_TXHDR_LEN 0x10
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#define MLXSW_TXHDR_VERSION_0 0
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#define MLXSW_TXHDR_VERSION_1 1
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enum {
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MLXSW_TXHDR_ETH_CTL,
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MLXSW_TXHDR_ETH_DATA,
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};
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#define MLXSW_TXHDR_PROTO_ETH 1
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enum {
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MLXSW_TXHDR_ETCLASS_0,
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MLXSW_TXHDR_ETCLASS_1,
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MLXSW_TXHDR_ETCLASS_2,
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MLXSW_TXHDR_ETCLASS_3,
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MLXSW_TXHDR_ETCLASS_4,
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MLXSW_TXHDR_ETCLASS_5,
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MLXSW_TXHDR_ETCLASS_6,
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MLXSW_TXHDR_ETCLASS_7,
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};
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enum {
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MLXSW_TXHDR_RDQ_OTHER,
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MLXSW_TXHDR_RDQ_EMAD = 0x1f,
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};
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#define MLXSW_TXHDR_CTCLASS3 0
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#define MLXSW_TXHDR_CPU_SIG 0
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#define MLXSW_TXHDR_SIG 0xE0E0
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#define MLXSW_TXHDR_STCLASS_NONE 0
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enum {
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MLXSW_TXHDR_NOT_EMAD,
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MLXSW_TXHDR_EMAD,
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};
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enum {
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MLXSW_TXHDR_TYPE_DATA,
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MLXSW_TXHDR_TYPE_CONTROL = 6,
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};
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#endif
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