467 lines
10 KiB
C
467 lines
10 KiB
C
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/*
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* Ethernet driver for the WIZnet W5100/W5200/W5500 chip.
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*
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* Copyright (C) 2016 Akinobu Mita <akinobu.mita@gmail.com>
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*
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* Licensed under the GPL-2 or later.
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*
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* Datasheet:
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* http://www.wiznet.co.kr/wp-content/uploads/wiznethome/Chip/W5100/Document/W5100_Datasheet_v1.2.6.pdf
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* http://wiznethome.cafe24.com/wp-content/uploads/wiznethome/Chip/W5200/Documents/W5200_DS_V140E.pdf
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* http://wizwiki.net/wiki/lib/exe/fetch.php?media=products:w5500:w5500_ds_v106e_141230.pdf
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/netdevice.h>
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#include <linux/of_net.h>
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#include <linux/spi/spi.h>
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#include "w5100.h"
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#define W5100_SPI_WRITE_OPCODE 0xf0
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#define W5100_SPI_READ_OPCODE 0x0f
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static int w5100_spi_read(struct net_device *ndev, u32 addr)
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{
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struct spi_device *spi = to_spi_device(ndev->dev.parent);
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u8 cmd[3] = { W5100_SPI_READ_OPCODE, addr >> 8, addr & 0xff };
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u8 data;
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int ret;
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ret = spi_write_then_read(spi, cmd, sizeof(cmd), &data, 1);
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return ret ? ret : data;
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}
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static int w5100_spi_write(struct net_device *ndev, u32 addr, u8 data)
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{
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struct spi_device *spi = to_spi_device(ndev->dev.parent);
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u8 cmd[4] = { W5100_SPI_WRITE_OPCODE, addr >> 8, addr & 0xff, data};
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return spi_write_then_read(spi, cmd, sizeof(cmd), NULL, 0);
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}
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static int w5100_spi_read16(struct net_device *ndev, u32 addr)
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{
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u16 data;
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int ret;
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ret = w5100_spi_read(ndev, addr);
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if (ret < 0)
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return ret;
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data = ret << 8;
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ret = w5100_spi_read(ndev, addr + 1);
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return ret < 0 ? ret : data | ret;
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}
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static int w5100_spi_write16(struct net_device *ndev, u32 addr, u16 data)
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{
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int ret;
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ret = w5100_spi_write(ndev, addr, data >> 8);
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if (ret)
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return ret;
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return w5100_spi_write(ndev, addr + 1, data & 0xff);
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}
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static int w5100_spi_readbulk(struct net_device *ndev, u32 addr, u8 *buf,
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int len)
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{
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int i;
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for (i = 0; i < len; i++) {
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int ret = w5100_spi_read(ndev, addr + i);
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if (ret < 0)
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return ret;
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buf[i] = ret;
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}
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return 0;
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}
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static int w5100_spi_writebulk(struct net_device *ndev, u32 addr, const u8 *buf,
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int len)
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{
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int i;
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for (i = 0; i < len; i++) {
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int ret = w5100_spi_write(ndev, addr + i, buf[i]);
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if (ret)
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return ret;
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}
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return 0;
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}
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static const struct w5100_ops w5100_spi_ops = {
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.may_sleep = true,
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.chip_id = W5100,
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.read = w5100_spi_read,
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.write = w5100_spi_write,
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.read16 = w5100_spi_read16,
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.write16 = w5100_spi_write16,
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.readbulk = w5100_spi_readbulk,
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.writebulk = w5100_spi_writebulk,
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};
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#define W5200_SPI_WRITE_OPCODE 0x80
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struct w5200_spi_priv {
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/* Serialize access to cmd_buf */
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struct mutex cmd_lock;
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/* DMA (thus cache coherency maintenance) requires the
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* transfer buffers to live in their own cache lines.
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*/
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u8 cmd_buf[4] ____cacheline_aligned;
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};
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static struct w5200_spi_priv *w5200_spi_priv(struct net_device *ndev)
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{
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return w5100_ops_priv(ndev);
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}
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static int w5200_spi_init(struct net_device *ndev)
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{
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struct w5200_spi_priv *spi_priv = w5200_spi_priv(ndev);
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mutex_init(&spi_priv->cmd_lock);
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return 0;
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}
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static int w5200_spi_read(struct net_device *ndev, u32 addr)
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{
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struct spi_device *spi = to_spi_device(ndev->dev.parent);
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u8 cmd[4] = { addr >> 8, addr & 0xff, 0, 1 };
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u8 data;
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int ret;
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ret = spi_write_then_read(spi, cmd, sizeof(cmd), &data, 1);
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return ret ? ret : data;
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}
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static int w5200_spi_write(struct net_device *ndev, u32 addr, u8 data)
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{
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struct spi_device *spi = to_spi_device(ndev->dev.parent);
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u8 cmd[5] = { addr >> 8, addr & 0xff, W5200_SPI_WRITE_OPCODE, 1, data };
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return spi_write_then_read(spi, cmd, sizeof(cmd), NULL, 0);
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}
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static int w5200_spi_read16(struct net_device *ndev, u32 addr)
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{
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struct spi_device *spi = to_spi_device(ndev->dev.parent);
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u8 cmd[4] = { addr >> 8, addr & 0xff, 0, 2 };
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__be16 data;
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int ret;
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ret = spi_write_then_read(spi, cmd, sizeof(cmd), &data, sizeof(data));
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return ret ? ret : be16_to_cpu(data);
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}
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static int w5200_spi_write16(struct net_device *ndev, u32 addr, u16 data)
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{
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struct spi_device *spi = to_spi_device(ndev->dev.parent);
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u8 cmd[6] = {
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addr >> 8, addr & 0xff,
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W5200_SPI_WRITE_OPCODE, 2,
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data >> 8, data & 0xff
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};
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return spi_write_then_read(spi, cmd, sizeof(cmd), NULL, 0);
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}
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static int w5200_spi_readbulk(struct net_device *ndev, u32 addr, u8 *buf,
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int len)
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{
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struct spi_device *spi = to_spi_device(ndev->dev.parent);
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struct w5200_spi_priv *spi_priv = w5200_spi_priv(ndev);
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struct spi_transfer xfer[] = {
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{
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.tx_buf = spi_priv->cmd_buf,
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.len = sizeof(spi_priv->cmd_buf),
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},
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{
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.rx_buf = buf,
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.len = len,
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},
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};
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int ret;
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mutex_lock(&spi_priv->cmd_lock);
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spi_priv->cmd_buf[0] = addr >> 8;
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spi_priv->cmd_buf[1] = addr;
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spi_priv->cmd_buf[2] = len >> 8;
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spi_priv->cmd_buf[3] = len;
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ret = spi_sync_transfer(spi, xfer, ARRAY_SIZE(xfer));
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mutex_unlock(&spi_priv->cmd_lock);
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return ret;
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}
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static int w5200_spi_writebulk(struct net_device *ndev, u32 addr, const u8 *buf,
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int len)
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{
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struct spi_device *spi = to_spi_device(ndev->dev.parent);
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struct w5200_spi_priv *spi_priv = w5200_spi_priv(ndev);
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struct spi_transfer xfer[] = {
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{
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.tx_buf = spi_priv->cmd_buf,
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.len = sizeof(spi_priv->cmd_buf),
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},
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{
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.tx_buf = buf,
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.len = len,
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},
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};
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int ret;
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mutex_lock(&spi_priv->cmd_lock);
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spi_priv->cmd_buf[0] = addr >> 8;
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spi_priv->cmd_buf[1] = addr;
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spi_priv->cmd_buf[2] = W5200_SPI_WRITE_OPCODE | (len >> 8);
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spi_priv->cmd_buf[3] = len;
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ret = spi_sync_transfer(spi, xfer, ARRAY_SIZE(xfer));
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mutex_unlock(&spi_priv->cmd_lock);
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return ret;
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}
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static const struct w5100_ops w5200_ops = {
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.may_sleep = true,
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.chip_id = W5200,
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.read = w5200_spi_read,
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.write = w5200_spi_write,
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.read16 = w5200_spi_read16,
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.write16 = w5200_spi_write16,
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.readbulk = w5200_spi_readbulk,
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.writebulk = w5200_spi_writebulk,
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.init = w5200_spi_init,
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};
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#define W5500_SPI_BLOCK_SELECT(addr) (((addr) >> 16) & 0x1f)
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#define W5500_SPI_READ_CONTROL(addr) (W5500_SPI_BLOCK_SELECT(addr) << 3)
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#define W5500_SPI_WRITE_CONTROL(addr) \
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((W5500_SPI_BLOCK_SELECT(addr) << 3) | BIT(2))
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struct w5500_spi_priv {
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/* Serialize access to cmd_buf */
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struct mutex cmd_lock;
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/* DMA (thus cache coherency maintenance) requires the
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* transfer buffers to live in their own cache lines.
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*/
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u8 cmd_buf[3] ____cacheline_aligned;
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};
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static struct w5500_spi_priv *w5500_spi_priv(struct net_device *ndev)
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{
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return w5100_ops_priv(ndev);
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}
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static int w5500_spi_init(struct net_device *ndev)
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{
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struct w5500_spi_priv *spi_priv = w5500_spi_priv(ndev);
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mutex_init(&spi_priv->cmd_lock);
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return 0;
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}
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static int w5500_spi_read(struct net_device *ndev, u32 addr)
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{
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struct spi_device *spi = to_spi_device(ndev->dev.parent);
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u8 cmd[3] = {
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addr >> 8,
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addr,
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W5500_SPI_READ_CONTROL(addr)
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};
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u8 data;
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int ret;
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ret = spi_write_then_read(spi, cmd, sizeof(cmd), &data, 1);
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return ret ? ret : data;
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}
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static int w5500_spi_write(struct net_device *ndev, u32 addr, u8 data)
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{
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struct spi_device *spi = to_spi_device(ndev->dev.parent);
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u8 cmd[4] = {
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addr >> 8,
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addr,
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W5500_SPI_WRITE_CONTROL(addr),
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data
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};
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return spi_write_then_read(spi, cmd, sizeof(cmd), NULL, 0);
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}
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static int w5500_spi_read16(struct net_device *ndev, u32 addr)
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{
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struct spi_device *spi = to_spi_device(ndev->dev.parent);
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u8 cmd[3] = {
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addr >> 8,
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addr,
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W5500_SPI_READ_CONTROL(addr)
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};
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__be16 data;
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int ret;
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ret = spi_write_then_read(spi, cmd, sizeof(cmd), &data, sizeof(data));
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return ret ? ret : be16_to_cpu(data);
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}
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static int w5500_spi_write16(struct net_device *ndev, u32 addr, u16 data)
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{
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struct spi_device *spi = to_spi_device(ndev->dev.parent);
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u8 cmd[5] = {
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addr >> 8,
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addr,
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W5500_SPI_WRITE_CONTROL(addr),
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data >> 8,
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data
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};
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return spi_write_then_read(spi, cmd, sizeof(cmd), NULL, 0);
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}
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static int w5500_spi_readbulk(struct net_device *ndev, u32 addr, u8 *buf,
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int len)
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{
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struct spi_device *spi = to_spi_device(ndev->dev.parent);
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struct w5500_spi_priv *spi_priv = w5500_spi_priv(ndev);
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struct spi_transfer xfer[] = {
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{
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.tx_buf = spi_priv->cmd_buf,
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.len = sizeof(spi_priv->cmd_buf),
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},
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{
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.rx_buf = buf,
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.len = len,
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},
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};
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int ret;
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mutex_lock(&spi_priv->cmd_lock);
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spi_priv->cmd_buf[0] = addr >> 8;
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spi_priv->cmd_buf[1] = addr;
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spi_priv->cmd_buf[2] = W5500_SPI_READ_CONTROL(addr);
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ret = spi_sync_transfer(spi, xfer, ARRAY_SIZE(xfer));
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mutex_unlock(&spi_priv->cmd_lock);
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return ret;
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}
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|
static int w5500_spi_writebulk(struct net_device *ndev, u32 addr, const u8 *buf,
|
||
|
|
int len)
|
||
|
|
{
|
||
|
|
struct spi_device *spi = to_spi_device(ndev->dev.parent);
|
||
|
|
struct w5500_spi_priv *spi_priv = w5500_spi_priv(ndev);
|
||
|
|
struct spi_transfer xfer[] = {
|
||
|
|
{
|
||
|
|
.tx_buf = spi_priv->cmd_buf,
|
||
|
|
.len = sizeof(spi_priv->cmd_buf),
|
||
|
|
},
|
||
|
|
{
|
||
|
|
.tx_buf = buf,
|
||
|
|
.len = len,
|
||
|
|
},
|
||
|
|
};
|
||
|
|
int ret;
|
||
|
|
|
||
|
|
mutex_lock(&spi_priv->cmd_lock);
|
||
|
|
|
||
|
|
spi_priv->cmd_buf[0] = addr >> 8;
|
||
|
|
spi_priv->cmd_buf[1] = addr;
|
||
|
|
spi_priv->cmd_buf[2] = W5500_SPI_WRITE_CONTROL(addr);
|
||
|
|
ret = spi_sync_transfer(spi, xfer, ARRAY_SIZE(xfer));
|
||
|
|
|
||
|
|
mutex_unlock(&spi_priv->cmd_lock);
|
||
|
|
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
static const struct w5100_ops w5500_ops = {
|
||
|
|
.may_sleep = true,
|
||
|
|
.chip_id = W5500,
|
||
|
|
.read = w5500_spi_read,
|
||
|
|
.write = w5500_spi_write,
|
||
|
|
.read16 = w5500_spi_read16,
|
||
|
|
.write16 = w5500_spi_write16,
|
||
|
|
.readbulk = w5500_spi_readbulk,
|
||
|
|
.writebulk = w5500_spi_writebulk,
|
||
|
|
.init = w5500_spi_init,
|
||
|
|
};
|
||
|
|
|
||
|
|
static int w5100_spi_probe(struct spi_device *spi)
|
||
|
|
{
|
||
|
|
const struct spi_device_id *id = spi_get_device_id(spi);
|
||
|
|
const struct w5100_ops *ops;
|
||
|
|
int priv_size;
|
||
|
|
const void *mac = of_get_mac_address(spi->dev.of_node);
|
||
|
|
|
||
|
|
switch (id->driver_data) {
|
||
|
|
case W5100:
|
||
|
|
ops = &w5100_spi_ops;
|
||
|
|
priv_size = 0;
|
||
|
|
break;
|
||
|
|
case W5200:
|
||
|
|
ops = &w5200_ops;
|
||
|
|
priv_size = sizeof(struct w5200_spi_priv);
|
||
|
|
break;
|
||
|
|
case W5500:
|
||
|
|
ops = &w5500_ops;
|
||
|
|
priv_size = sizeof(struct w5500_spi_priv);
|
||
|
|
break;
|
||
|
|
default:
|
||
|
|
return -EINVAL;
|
||
|
|
}
|
||
|
|
|
||
|
|
return w5100_probe(&spi->dev, ops, priv_size, mac, spi->irq, -EINVAL);
|
||
|
|
}
|
||
|
|
|
||
|
|
static int w5100_spi_remove(struct spi_device *spi)
|
||
|
|
{
|
||
|
|
return w5100_remove(&spi->dev);
|
||
|
|
}
|
||
|
|
|
||
|
|
static const struct spi_device_id w5100_spi_ids[] = {
|
||
|
|
{ "w5100", W5100 },
|
||
|
|
{ "w5200", W5200 },
|
||
|
|
{ "w5500", W5500 },
|
||
|
|
{}
|
||
|
|
};
|
||
|
|
MODULE_DEVICE_TABLE(spi, w5100_spi_ids);
|
||
|
|
|
||
|
|
static struct spi_driver w5100_spi_driver = {
|
||
|
|
.driver = {
|
||
|
|
.name = "w5100",
|
||
|
|
.pm = &w5100_pm_ops,
|
||
|
|
},
|
||
|
|
.probe = w5100_spi_probe,
|
||
|
|
.remove = w5100_spi_remove,
|
||
|
|
.id_table = w5100_spi_ids,
|
||
|
|
};
|
||
|
|
module_spi_driver(w5100_spi_driver);
|
||
|
|
|
||
|
|
MODULE_DESCRIPTION("WIZnet W5100/W5200/W5500 Ethernet driver for SPI mode");
|
||
|
|
MODULE_AUTHOR("Akinobu Mita <akinobu.mita@gmail.com>");
|
||
|
|
MODULE_LICENSE("GPL");
|