103 lines
3.4 KiB
C
103 lines
3.4 KiB
C
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/******************************************************************************
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*
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* Copyright(c) 2009-2012 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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*
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* Larry Finger <Larry.Finger@lwfinger.net>
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*
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*****************************************************************************/
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#ifndef __RTL92S_PHY_H__
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#define __RTL92S_PHY_H__
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#define MAX_TXPWR_IDX_NMODE_92S 63
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#define MAX_DOZE_WAITING_TIMES_9x 64
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/* Channel switch:The size of
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* command tables for switch channel */
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#define MAX_PRECMD_CNT 16
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#define MAX_RFDEPENDCMD_CNT 16
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#define MAX_POSTCMD_CNT 16
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#define RF90_PATH_MAX 4
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#define RF6052_MAX_PATH 2
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enum version_8192s {
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VERSION_8192S_ACUT,
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VERSION_8192S_BCUT,
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VERSION_8192S_CCUT
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};
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enum swchnlcmd_id {
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CMDID_END,
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CMDID_SET_TXPOWEROWER_LEVEL,
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CMDID_BBREGWRITE10,
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CMDID_WRITEPORT_ULONG,
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CMDID_WRITEPORT_USHORT,
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CMDID_WRITEPORT_UCHAR,
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CMDID_RF_WRITEREG,
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};
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struct swchnlcmd {
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enum swchnlcmd_id cmdid;
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u32 para1;
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u32 para2;
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u32 msdelay;
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};
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enum baseband_config_type {
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/* Radio Path A */
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BASEBAND_CONFIG_PHY_REG = 0,
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/* Radio Path B */
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BASEBAND_CONFIG_AGC_TAB = 1,
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};
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#define hal_get_firmwareversion(rtlpriv) \
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(((struct rt_firmware *)(rtlpriv->rtlhal.pfirmware))->firmwareversion)
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u32 rtl92s_phy_query_bb_reg(struct ieee80211_hw *hw, u32 regaddr, u32 bitmask);
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void rtl92s_phy_set_bb_reg(struct ieee80211_hw *hw, u32 regaddr, u32 bitmask,
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u32 data);
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void rtl92s_phy_scan_operation_backup(struct ieee80211_hw *hw, u8 operation);
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u32 rtl92s_phy_query_rf_reg(struct ieee80211_hw *hw, enum radio_path rfpath,
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u32 regaddr, u32 bitmask);
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void rtl92s_phy_set_rf_reg(struct ieee80211_hw *hw, enum radio_path rfpath,
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u32 regaddr, u32 bitmask, u32 data);
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void rtl92s_phy_set_bw_mode(struct ieee80211_hw *hw,
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enum nl80211_channel_type ch_type);
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u8 rtl92s_phy_sw_chnl(struct ieee80211_hw *hw);
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bool rtl92s_phy_set_rf_power_state(struct ieee80211_hw *hw,
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enum rf_pwrstate rfpower_state);
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bool rtl92s_phy_mac_config(struct ieee80211_hw *hw);
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void rtl92s_phy_switch_ephy_parameter(struct ieee80211_hw *hw);
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bool rtl92s_phy_bb_config(struct ieee80211_hw *hw);
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bool rtl92s_phy_rf_config(struct ieee80211_hw *hw);
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void rtl92s_phy_get_hw_reg_originalvalue(struct ieee80211_hw *hw);
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void rtl92s_phy_set_txpower(struct ieee80211_hw *hw, u8 channel);
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bool rtl92s_phy_set_fw_cmd(struct ieee80211_hw *hw, enum fwcmd_iotype fwcmd_io);
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void rtl92s_phy_chk_fwcmd_iodone(struct ieee80211_hw *hw);
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void rtl92s_phy_set_beacon_hwreg(struct ieee80211_hw *hw, u16 beaconinterval);
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u8 rtl92s_phy_config_rf(struct ieee80211_hw *hw, enum radio_path rfpath) ;
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#endif
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