142 lines
3.3 KiB
C
142 lines
3.3 KiB
C
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/*
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* Access ACPI _OSC method
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*
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* Copyright (C) 2006 Intel Corp.
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* Tom Long Nguyen (tom.l.nguyen@intel.com)
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* Zhang Yanmin (yanmin.zhang@intel.com)
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*
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*/
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/pm.h>
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#include <linux/suspend.h>
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#include <linux/acpi.h>
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#include <linux/pci-acpi.h>
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#include <linux/delay.h>
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#include <acpi/apei.h>
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#include "aerdrv.h"
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#ifdef CONFIG_ACPI_APEI
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static inline int hest_match_pci(struct acpi_hest_aer_common *p,
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struct pci_dev *pci)
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{
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return ACPI_HEST_SEGMENT(p->bus) == pci_domain_nr(pci->bus) &&
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ACPI_HEST_BUS(p->bus) == pci->bus->number &&
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p->device == PCI_SLOT(pci->devfn) &&
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p->function == PCI_FUNC(pci->devfn);
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}
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static inline bool hest_match_type(struct acpi_hest_header *hest_hdr,
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struct pci_dev *dev)
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{
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u16 hest_type = hest_hdr->type;
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u8 pcie_type = pci_pcie_type(dev);
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if ((hest_type == ACPI_HEST_TYPE_AER_ROOT_PORT &&
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pcie_type == PCI_EXP_TYPE_ROOT_PORT) ||
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(hest_type == ACPI_HEST_TYPE_AER_ENDPOINT &&
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pcie_type == PCI_EXP_TYPE_ENDPOINT) ||
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(hest_type == ACPI_HEST_TYPE_AER_BRIDGE &&
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(dev->class >> 16) == PCI_BASE_CLASS_BRIDGE))
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return true;
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return false;
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}
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struct aer_hest_parse_info {
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struct pci_dev *pci_dev;
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int firmware_first;
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};
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static int hest_source_is_pcie_aer(struct acpi_hest_header *hest_hdr)
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{
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if (hest_hdr->type == ACPI_HEST_TYPE_AER_ROOT_PORT ||
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hest_hdr->type == ACPI_HEST_TYPE_AER_ENDPOINT ||
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hest_hdr->type == ACPI_HEST_TYPE_AER_BRIDGE)
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return 1;
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return 0;
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}
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static int aer_hest_parse(struct acpi_hest_header *hest_hdr, void *data)
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{
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struct aer_hest_parse_info *info = data;
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struct acpi_hest_aer_common *p;
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int ff;
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if (!hest_source_is_pcie_aer(hest_hdr))
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return 0;
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p = (struct acpi_hest_aer_common *)(hest_hdr + 1);
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ff = !!(p->flags & ACPI_HEST_FIRMWARE_FIRST);
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/*
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* If no specific device is supplied, determine whether
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* FIRMWARE_FIRST is set for *any* PCIe device.
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*/
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if (!info->pci_dev) {
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info->firmware_first |= ff;
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return 0;
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}
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/* Otherwise, check the specific device */
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if (p->flags & ACPI_HEST_GLOBAL) {
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if (hest_match_type(hest_hdr, info->pci_dev))
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info->firmware_first = ff;
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} else
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if (hest_match_pci(p, info->pci_dev))
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info->firmware_first = ff;
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return 0;
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}
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static void aer_set_firmware_first(struct pci_dev *pci_dev)
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{
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int rc;
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struct aer_hest_parse_info info = {
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.pci_dev = pci_dev,
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.firmware_first = 0,
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};
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rc = apei_hest_parse(aer_hest_parse, &info);
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if (rc)
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pci_dev->__aer_firmware_first = 0;
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else
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pci_dev->__aer_firmware_first = info.firmware_first;
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pci_dev->__aer_firmware_first_valid = 1;
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}
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int pcie_aer_get_firmware_first(struct pci_dev *dev)
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{
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if (!pci_is_pcie(dev))
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return 0;
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if (!dev->__aer_firmware_first_valid)
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aer_set_firmware_first(dev);
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return dev->__aer_firmware_first;
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}
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static bool aer_firmware_first;
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/**
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* aer_acpi_firmware_first - Check if APEI should control AER.
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*/
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bool aer_acpi_firmware_first(void)
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{
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static bool parsed = false;
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struct aer_hest_parse_info info = {
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.pci_dev = NULL, /* Check all PCIe devices */
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.firmware_first = 0,
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};
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if (!parsed) {
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apei_hest_parse(aer_hest_parse, &info);
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aer_firmware_first = info.firmware_first;
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parsed = true;
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}
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return aer_firmware_first;
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}
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#endif
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