462 lines
12 KiB
C
462 lines
12 KiB
C
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/*
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* An RTC driver for Allwinner A31/A23
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*
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* Copyright (c) 2014, Chen-Yu Tsai <wens@csie.org>
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*
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* based on rtc-sunxi.c
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*
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* An RTC driver for Allwinner A10/A20
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*
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* Copyright (c) 2013, Carlo Caione <carlo.caione@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/fs.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/rtc.h>
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#include <linux/types.h>
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/* Control register */
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#define SUN6I_LOSC_CTRL 0x0000
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#define SUN6I_LOSC_CTRL_KEY (0x16aa << 16)
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#define SUN6I_LOSC_CTRL_ALM_DHMS_ACC BIT(9)
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#define SUN6I_LOSC_CTRL_RTC_HMS_ACC BIT(8)
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#define SUN6I_LOSC_CTRL_RTC_YMD_ACC BIT(7)
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#define SUN6I_LOSC_CTRL_EXT_OSC BIT(0)
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#define SUN6I_LOSC_CTRL_ACC_MASK GENMASK(9, 7)
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/* RTC */
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#define SUN6I_RTC_YMD 0x0010
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#define SUN6I_RTC_HMS 0x0014
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/* Alarm 0 (counter) */
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#define SUN6I_ALRM_COUNTER 0x0020
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#define SUN6I_ALRM_CUR_VAL 0x0024
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#define SUN6I_ALRM_EN 0x0028
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#define SUN6I_ALRM_EN_CNT_EN BIT(0)
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#define SUN6I_ALRM_IRQ_EN 0x002c
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#define SUN6I_ALRM_IRQ_EN_CNT_IRQ_EN BIT(0)
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#define SUN6I_ALRM_IRQ_STA 0x0030
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#define SUN6I_ALRM_IRQ_STA_CNT_IRQ_PEND BIT(0)
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/* Alarm 1 (wall clock) */
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#define SUN6I_ALRM1_EN 0x0044
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#define SUN6I_ALRM1_IRQ_EN 0x0048
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#define SUN6I_ALRM1_IRQ_STA 0x004c
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#define SUN6I_ALRM1_IRQ_STA_WEEK_IRQ_PEND BIT(0)
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/* Alarm config */
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#define SUN6I_ALARM_CONFIG 0x0050
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#define SUN6I_ALARM_CONFIG_WAKEUP BIT(0)
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/*
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* Get date values
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*/
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#define SUN6I_DATE_GET_DAY_VALUE(x) ((x) & 0x0000001f)
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#define SUN6I_DATE_GET_MON_VALUE(x) (((x) & 0x00000f00) >> 8)
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#define SUN6I_DATE_GET_YEAR_VALUE(x) (((x) & 0x003f0000) >> 16)
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#define SUN6I_LEAP_GET_VALUE(x) (((x) & 0x00400000) >> 22)
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/*
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* Get time values
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*/
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#define SUN6I_TIME_GET_SEC_VALUE(x) ((x) & 0x0000003f)
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#define SUN6I_TIME_GET_MIN_VALUE(x) (((x) & 0x00003f00) >> 8)
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#define SUN6I_TIME_GET_HOUR_VALUE(x) (((x) & 0x001f0000) >> 16)
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/*
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* Set date values
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*/
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#define SUN6I_DATE_SET_DAY_VALUE(x) ((x) & 0x0000001f)
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#define SUN6I_DATE_SET_MON_VALUE(x) ((x) << 8 & 0x00000f00)
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#define SUN6I_DATE_SET_YEAR_VALUE(x) ((x) << 16 & 0x003f0000)
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#define SUN6I_LEAP_SET_VALUE(x) ((x) << 22 & 0x00400000)
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/*
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* Set time values
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*/
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#define SUN6I_TIME_SET_SEC_VALUE(x) ((x) & 0x0000003f)
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#define SUN6I_TIME_SET_MIN_VALUE(x) ((x) << 8 & 0x00003f00)
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#define SUN6I_TIME_SET_HOUR_VALUE(x) ((x) << 16 & 0x001f0000)
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/*
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* The year parameter passed to the driver is usually an offset relative to
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* the year 1900. This macro is used to convert this offset to another one
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* relative to the minimum year allowed by the hardware.
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*
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* The year range is 1970 - 2033. This range is selected to match Allwinner's
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* driver, even though it is somewhat limited.
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*/
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#define SUN6I_YEAR_MIN 1970
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#define SUN6I_YEAR_MAX 2033
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#define SUN6I_YEAR_OFF (SUN6I_YEAR_MIN - 1900)
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struct sun6i_rtc_dev {
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struct rtc_device *rtc;
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struct device *dev;
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void __iomem *base;
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int irq;
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unsigned long alarm;
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spinlock_t lock;
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};
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static irqreturn_t sun6i_rtc_alarmirq(int irq, void *id)
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{
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struct sun6i_rtc_dev *chip = (struct sun6i_rtc_dev *) id;
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irqreturn_t ret = IRQ_NONE;
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u32 val;
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spin_lock(&chip->lock);
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val = readl(chip->base + SUN6I_ALRM_IRQ_STA);
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if (val & SUN6I_ALRM_IRQ_STA_CNT_IRQ_PEND) {
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val |= SUN6I_ALRM_IRQ_STA_CNT_IRQ_PEND;
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writel(val, chip->base + SUN6I_ALRM_IRQ_STA);
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rtc_update_irq(chip->rtc, 1, RTC_AF | RTC_IRQF);
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ret = IRQ_HANDLED;
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}
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spin_unlock(&chip->lock);
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return ret;
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}
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static void sun6i_rtc_setaie(int to, struct sun6i_rtc_dev *chip)
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{
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u32 alrm_val = 0;
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u32 alrm_irq_val = 0;
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u32 alrm_wake_val = 0;
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unsigned long flags;
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if (to) {
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alrm_val = SUN6I_ALRM_EN_CNT_EN;
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alrm_irq_val = SUN6I_ALRM_IRQ_EN_CNT_IRQ_EN;
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alrm_wake_val = SUN6I_ALARM_CONFIG_WAKEUP;
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} else {
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writel(SUN6I_ALRM_IRQ_STA_CNT_IRQ_PEND,
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chip->base + SUN6I_ALRM_IRQ_STA);
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}
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spin_lock_irqsave(&chip->lock, flags);
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writel(alrm_val, chip->base + SUN6I_ALRM_EN);
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writel(alrm_irq_val, chip->base + SUN6I_ALRM_IRQ_EN);
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writel(alrm_wake_val, chip->base + SUN6I_ALARM_CONFIG);
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spin_unlock_irqrestore(&chip->lock, flags);
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}
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static int sun6i_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
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{
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struct sun6i_rtc_dev *chip = dev_get_drvdata(dev);
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u32 date, time;
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/*
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* read again in case it changes
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*/
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do {
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date = readl(chip->base + SUN6I_RTC_YMD);
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time = readl(chip->base + SUN6I_RTC_HMS);
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} while ((date != readl(chip->base + SUN6I_RTC_YMD)) ||
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(time != readl(chip->base + SUN6I_RTC_HMS)));
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rtc_tm->tm_sec = SUN6I_TIME_GET_SEC_VALUE(time);
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rtc_tm->tm_min = SUN6I_TIME_GET_MIN_VALUE(time);
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rtc_tm->tm_hour = SUN6I_TIME_GET_HOUR_VALUE(time);
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rtc_tm->tm_mday = SUN6I_DATE_GET_DAY_VALUE(date);
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rtc_tm->tm_mon = SUN6I_DATE_GET_MON_VALUE(date);
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rtc_tm->tm_year = SUN6I_DATE_GET_YEAR_VALUE(date);
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rtc_tm->tm_mon -= 1;
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/*
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* switch from (data_year->min)-relative offset to
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* a (1900)-relative one
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*/
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rtc_tm->tm_year += SUN6I_YEAR_OFF;
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return rtc_valid_tm(rtc_tm);
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}
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static int sun6i_rtc_getalarm(struct device *dev, struct rtc_wkalrm *wkalrm)
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{
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struct sun6i_rtc_dev *chip = dev_get_drvdata(dev);
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unsigned long flags;
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u32 alrm_st;
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u32 alrm_en;
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spin_lock_irqsave(&chip->lock, flags);
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alrm_en = readl(chip->base + SUN6I_ALRM_IRQ_EN);
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alrm_st = readl(chip->base + SUN6I_ALRM_IRQ_STA);
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spin_unlock_irqrestore(&chip->lock, flags);
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wkalrm->enabled = !!(alrm_en & SUN6I_ALRM_EN_CNT_EN);
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wkalrm->pending = !!(alrm_st & SUN6I_ALRM_EN_CNT_EN);
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rtc_time_to_tm(chip->alarm, &wkalrm->time);
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return 0;
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}
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static int sun6i_rtc_setalarm(struct device *dev, struct rtc_wkalrm *wkalrm)
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{
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struct sun6i_rtc_dev *chip = dev_get_drvdata(dev);
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struct rtc_time *alrm_tm = &wkalrm->time;
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struct rtc_time tm_now;
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unsigned long time_now = 0;
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unsigned long time_set = 0;
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unsigned long time_gap = 0;
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int ret = 0;
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ret = sun6i_rtc_gettime(dev, &tm_now);
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if (ret < 0) {
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dev_err(dev, "Error in getting time\n");
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return -EINVAL;
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}
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rtc_tm_to_time(alrm_tm, &time_set);
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rtc_tm_to_time(&tm_now, &time_now);
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if (time_set <= time_now) {
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dev_err(dev, "Date to set in the past\n");
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return -EINVAL;
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}
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time_gap = time_set - time_now;
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if (time_gap > U32_MAX) {
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dev_err(dev, "Date too far in the future\n");
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return -EINVAL;
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}
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sun6i_rtc_setaie(0, chip);
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writel(0, chip->base + SUN6I_ALRM_COUNTER);
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usleep_range(100, 300);
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writel(time_gap, chip->base + SUN6I_ALRM_COUNTER);
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chip->alarm = time_set;
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sun6i_rtc_setaie(wkalrm->enabled, chip);
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return 0;
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}
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static int sun6i_rtc_wait(struct sun6i_rtc_dev *chip, int offset,
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unsigned int mask, unsigned int ms_timeout)
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{
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const unsigned long timeout = jiffies + msecs_to_jiffies(ms_timeout);
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u32 reg;
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do {
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reg = readl(chip->base + offset);
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reg &= mask;
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if (!reg)
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return 0;
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} while (time_before(jiffies, timeout));
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return -ETIMEDOUT;
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}
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static int sun6i_rtc_settime(struct device *dev, struct rtc_time *rtc_tm)
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{
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struct sun6i_rtc_dev *chip = dev_get_drvdata(dev);
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u32 date = 0;
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u32 time = 0;
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int year;
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year = rtc_tm->tm_year + 1900;
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if (year < SUN6I_YEAR_MIN || year > SUN6I_YEAR_MAX) {
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dev_err(dev, "rtc only supports year in range %d - %d\n",
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SUN6I_YEAR_MIN, SUN6I_YEAR_MAX);
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return -EINVAL;
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}
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rtc_tm->tm_year -= SUN6I_YEAR_OFF;
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rtc_tm->tm_mon += 1;
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date = SUN6I_DATE_SET_DAY_VALUE(rtc_tm->tm_mday) |
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SUN6I_DATE_SET_MON_VALUE(rtc_tm->tm_mon) |
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SUN6I_DATE_SET_YEAR_VALUE(rtc_tm->tm_year);
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if (is_leap_year(year))
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date |= SUN6I_LEAP_SET_VALUE(1);
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time = SUN6I_TIME_SET_SEC_VALUE(rtc_tm->tm_sec) |
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SUN6I_TIME_SET_MIN_VALUE(rtc_tm->tm_min) |
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SUN6I_TIME_SET_HOUR_VALUE(rtc_tm->tm_hour);
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/* Check whether registers are writable */
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if (sun6i_rtc_wait(chip, SUN6I_LOSC_CTRL,
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SUN6I_LOSC_CTRL_ACC_MASK, 50)) {
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dev_err(dev, "rtc is still busy.\n");
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return -EBUSY;
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}
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writel(time, chip->base + SUN6I_RTC_HMS);
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/*
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* After writing the RTC HH-MM-SS register, the
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* SUN6I_LOSC_CTRL_RTC_HMS_ACC bit is set and it will not
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* be cleared until the real writing operation is finished
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*/
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if (sun6i_rtc_wait(chip, SUN6I_LOSC_CTRL,
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SUN6I_LOSC_CTRL_RTC_HMS_ACC, 50)) {
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dev_err(dev, "Failed to set rtc time.\n");
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return -ETIMEDOUT;
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}
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writel(date, chip->base + SUN6I_RTC_YMD);
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/*
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* After writing the RTC YY-MM-DD register, the
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* SUN6I_LOSC_CTRL_RTC_YMD_ACC bit is set and it will not
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* be cleared until the real writing operation is finished
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*/
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if (sun6i_rtc_wait(chip, SUN6I_LOSC_CTRL,
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SUN6I_LOSC_CTRL_RTC_YMD_ACC, 50)) {
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dev_err(dev, "Failed to set rtc time.\n");
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return -ETIMEDOUT;
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}
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return 0;
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}
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static int sun6i_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
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{
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struct sun6i_rtc_dev *chip = dev_get_drvdata(dev);
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if (!enabled)
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sun6i_rtc_setaie(enabled, chip);
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return 0;
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}
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static const struct rtc_class_ops sun6i_rtc_ops = {
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.read_time = sun6i_rtc_gettime,
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.set_time = sun6i_rtc_settime,
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.read_alarm = sun6i_rtc_getalarm,
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.set_alarm = sun6i_rtc_setalarm,
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.alarm_irq_enable = sun6i_rtc_alarm_irq_enable
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};
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static int sun6i_rtc_probe(struct platform_device *pdev)
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{
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struct sun6i_rtc_dev *chip;
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struct resource *res;
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int ret;
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chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
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if (!chip)
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return -ENOMEM;
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spin_lock_init(&chip->lock);
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platform_set_drvdata(pdev, chip);
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chip->dev = &pdev->dev;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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chip->base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(chip->base))
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return PTR_ERR(chip->base);
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chip->irq = platform_get_irq(pdev, 0);
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if (chip->irq < 0) {
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dev_err(&pdev->dev, "No IRQ resource\n");
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return chip->irq;
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}
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ret = devm_request_irq(&pdev->dev, chip->irq, sun6i_rtc_alarmirq,
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0, dev_name(&pdev->dev), chip);
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if (ret) {
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dev_err(&pdev->dev, "Could not request IRQ\n");
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return ret;
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}
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/* clear the alarm counter value */
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writel(0, chip->base + SUN6I_ALRM_COUNTER);
|
||
|
|
||
|
/* disable counter alarm */
|
||
|
writel(0, chip->base + SUN6I_ALRM_EN);
|
||
|
|
||
|
/* disable counter alarm interrupt */
|
||
|
writel(0, chip->base + SUN6I_ALRM_IRQ_EN);
|
||
|
|
||
|
/* disable week alarm */
|
||
|
writel(0, chip->base + SUN6I_ALRM1_EN);
|
||
|
|
||
|
/* disable week alarm interrupt */
|
||
|
writel(0, chip->base + SUN6I_ALRM1_IRQ_EN);
|
||
|
|
||
|
/* clear counter alarm pending interrupts */
|
||
|
writel(SUN6I_ALRM_IRQ_STA_CNT_IRQ_PEND,
|
||
|
chip->base + SUN6I_ALRM_IRQ_STA);
|
||
|
|
||
|
/* clear week alarm pending interrupts */
|
||
|
writel(SUN6I_ALRM1_IRQ_STA_WEEK_IRQ_PEND,
|
||
|
chip->base + SUN6I_ALRM1_IRQ_STA);
|
||
|
|
||
|
/* disable alarm wakeup */
|
||
|
writel(0, chip->base + SUN6I_ALARM_CONFIG);
|
||
|
|
||
|
/* switch to the external, more precise, oscillator */
|
||
|
writel(SUN6I_LOSC_CTRL_KEY | SUN6I_LOSC_CTRL_EXT_OSC,
|
||
|
chip->base + SUN6I_LOSC_CTRL);
|
||
|
|
||
|
chip->rtc = rtc_device_register("rtc-sun6i", &pdev->dev,
|
||
|
&sun6i_rtc_ops, THIS_MODULE);
|
||
|
if (IS_ERR(chip->rtc)) {
|
||
|
dev_err(&pdev->dev, "unable to register device\n");
|
||
|
return PTR_ERR(chip->rtc);
|
||
|
}
|
||
|
|
||
|
dev_info(&pdev->dev, "RTC enabled\n");
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
static int sun6i_rtc_remove(struct platform_device *pdev)
|
||
|
{
|
||
|
struct sun6i_rtc_dev *chip = platform_get_drvdata(pdev);
|
||
|
|
||
|
rtc_device_unregister(chip->rtc);
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
static const struct of_device_id sun6i_rtc_dt_ids[] = {
|
||
|
{ .compatible = "allwinner,sun6i-a31-rtc" },
|
||
|
{ /* sentinel */ },
|
||
|
};
|
||
|
MODULE_DEVICE_TABLE(of, sun6i_rtc_dt_ids);
|
||
|
|
||
|
static struct platform_driver sun6i_rtc_driver = {
|
||
|
.probe = sun6i_rtc_probe,
|
||
|
.remove = sun6i_rtc_remove,
|
||
|
.driver = {
|
||
|
.name = "sun6i-rtc",
|
||
|
.of_match_table = sun6i_rtc_dt_ids,
|
||
|
},
|
||
|
};
|
||
|
builtin_platform_driver(sun6i_rtc_driver);
|