356 lines
9.3 KiB
C
356 lines
9.3 KiB
C
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/* Copyright 2008 - 2016 Freescale Semiconductor, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of Freescale Semiconductor nor the
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* ALTERNATIVELY, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") as published by the Free Software
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* Foundation, either version 2 of that License or (at your option) any
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* later version.
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*
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* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
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* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "qman_priv.h"
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/* Enable portal interupts (as opposed to polling mode) */
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#define CONFIG_FSL_DPA_PIRQ_SLOW 1
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#define CONFIG_FSL_DPA_PIRQ_FAST 1
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static struct cpumask portal_cpus;
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/* protect qman global registers and global data shared among portals */
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static DEFINE_SPINLOCK(qman_lock);
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static void portal_set_cpu(struct qm_portal_config *pcfg, int cpu)
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{
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#ifdef CONFIG_FSL_PAMU
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struct device *dev = pcfg->dev;
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int window_count = 1;
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struct iommu_domain_geometry geom_attr;
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struct pamu_stash_attribute stash_attr;
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int ret;
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pcfg->iommu_domain = iommu_domain_alloc(&platform_bus_type);
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if (!pcfg->iommu_domain) {
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dev_err(dev, "%s(): iommu_domain_alloc() failed", __func__);
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goto no_iommu;
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}
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geom_attr.aperture_start = 0;
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geom_attr.aperture_end =
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((dma_addr_t)1 << min(8 * sizeof(dma_addr_t), (size_t)36)) - 1;
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geom_attr.force_aperture = true;
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ret = iommu_domain_set_attr(pcfg->iommu_domain, DOMAIN_ATTR_GEOMETRY,
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&geom_attr);
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if (ret < 0) {
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dev_err(dev, "%s(): iommu_domain_set_attr() = %d", __func__,
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ret);
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goto out_domain_free;
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}
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ret = iommu_domain_set_attr(pcfg->iommu_domain, DOMAIN_ATTR_WINDOWS,
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&window_count);
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if (ret < 0) {
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dev_err(dev, "%s(): iommu_domain_set_attr() = %d", __func__,
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ret);
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goto out_domain_free;
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}
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stash_attr.cpu = cpu;
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stash_attr.cache = PAMU_ATTR_CACHE_L1;
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ret = iommu_domain_set_attr(pcfg->iommu_domain,
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DOMAIN_ATTR_FSL_PAMU_STASH,
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&stash_attr);
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if (ret < 0) {
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dev_err(dev, "%s(): iommu_domain_set_attr() = %d",
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__func__, ret);
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goto out_domain_free;
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}
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ret = iommu_domain_window_enable(pcfg->iommu_domain, 0, 0, 1ULL << 36,
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IOMMU_READ | IOMMU_WRITE);
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if (ret < 0) {
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dev_err(dev, "%s(): iommu_domain_window_enable() = %d",
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__func__, ret);
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goto out_domain_free;
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}
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ret = iommu_attach_device(pcfg->iommu_domain, dev);
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if (ret < 0) {
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dev_err(dev, "%s(): iommu_device_attach() = %d", __func__,
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ret);
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goto out_domain_free;
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}
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ret = iommu_domain_set_attr(pcfg->iommu_domain,
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DOMAIN_ATTR_FSL_PAMU_ENABLE,
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&window_count);
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if (ret < 0) {
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dev_err(dev, "%s(): iommu_domain_set_attr() = %d", __func__,
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ret);
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goto out_detach_device;
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}
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no_iommu:
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#endif
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qman_set_sdest(pcfg->channel, cpu);
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return;
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#ifdef CONFIG_FSL_PAMU
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out_detach_device:
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iommu_detach_device(pcfg->iommu_domain, NULL);
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out_domain_free:
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iommu_domain_free(pcfg->iommu_domain);
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pcfg->iommu_domain = NULL;
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#endif
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}
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static struct qman_portal *init_pcfg(struct qm_portal_config *pcfg)
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{
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struct qman_portal *p;
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u32 irq_sources = 0;
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/* We need the same LIODN offset for all portals */
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qman_liodn_fixup(pcfg->channel);
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pcfg->iommu_domain = NULL;
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portal_set_cpu(pcfg, pcfg->cpu);
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p = qman_create_affine_portal(pcfg, NULL);
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if (!p) {
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dev_crit(pcfg->dev, "%s: Portal failure on cpu %d\n",
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__func__, pcfg->cpu);
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return NULL;
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}
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/* Determine what should be interrupt-vs-poll driven */
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#ifdef CONFIG_FSL_DPA_PIRQ_SLOW
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irq_sources |= QM_PIRQ_EQCI | QM_PIRQ_EQRI | QM_PIRQ_MRI |
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QM_PIRQ_CSCI;
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#endif
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#ifdef CONFIG_FSL_DPA_PIRQ_FAST
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irq_sources |= QM_PIRQ_DQRI;
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#endif
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qman_p_irqsource_add(p, irq_sources);
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spin_lock(&qman_lock);
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if (cpumask_equal(&portal_cpus, cpu_possible_mask)) {
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/* all assigned portals are initialized now */
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qman_init_cgr_all();
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}
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spin_unlock(&qman_lock);
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dev_info(pcfg->dev, "Portal initialised, cpu %d\n", pcfg->cpu);
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return p;
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}
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static void qman_portal_update_sdest(const struct qm_portal_config *pcfg,
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unsigned int cpu)
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{
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#ifdef CONFIG_FSL_PAMU /* TODO */
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struct pamu_stash_attribute stash_attr;
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int ret;
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if (pcfg->iommu_domain) {
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stash_attr.cpu = cpu;
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stash_attr.cache = PAMU_ATTR_CACHE_L1;
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ret = iommu_domain_set_attr(pcfg->iommu_domain,
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DOMAIN_ATTR_FSL_PAMU_STASH, &stash_attr);
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if (ret < 0) {
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dev_err(pcfg->dev,
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"Failed to update pamu stash setting\n");
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return;
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}
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}
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#endif
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qman_set_sdest(pcfg->channel, cpu);
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}
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static void qman_offline_cpu(unsigned int cpu)
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{
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struct qman_portal *p;
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const struct qm_portal_config *pcfg;
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p = affine_portals[cpu];
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if (p) {
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pcfg = qman_get_qm_portal_config(p);
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if (pcfg) {
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irq_set_affinity(pcfg->irq, cpumask_of(0));
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qman_portal_update_sdest(pcfg, 0);
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}
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}
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}
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static void qman_online_cpu(unsigned int cpu)
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{
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struct qman_portal *p;
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const struct qm_portal_config *pcfg;
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p = affine_portals[cpu];
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if (p) {
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pcfg = qman_get_qm_portal_config(p);
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if (pcfg) {
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irq_set_affinity(pcfg->irq, cpumask_of(cpu));
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qman_portal_update_sdest(pcfg, cpu);
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}
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}
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}
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static int qman_hotplug_cpu_callback(struct notifier_block *nfb,
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unsigned long action, void *hcpu)
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{
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unsigned int cpu = (unsigned long)hcpu;
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switch (action) {
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case CPU_ONLINE:
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case CPU_ONLINE_FROZEN:
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qman_online_cpu(cpu);
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break;
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case CPU_DOWN_PREPARE:
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case CPU_DOWN_PREPARE_FROZEN:
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qman_offline_cpu(cpu);
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default:
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break;
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}
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return NOTIFY_OK;
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}
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static struct notifier_block qman_hotplug_cpu_notifier = {
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.notifier_call = qman_hotplug_cpu_callback,
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};
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static int qman_portal_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct device_node *node = dev->of_node;
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struct qm_portal_config *pcfg;
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struct resource *addr_phys[2];
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const u32 *channel;
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void __iomem *va;
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int irq, len, cpu;
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pcfg = devm_kmalloc(dev, sizeof(*pcfg), GFP_KERNEL);
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if (!pcfg)
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return -ENOMEM;
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pcfg->dev = dev;
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addr_phys[0] = platform_get_resource(pdev, IORESOURCE_MEM,
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DPAA_PORTAL_CE);
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if (!addr_phys[0]) {
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dev_err(dev, "Can't get %s property 'reg::CE'\n",
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node->full_name);
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return -ENXIO;
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}
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addr_phys[1] = platform_get_resource(pdev, IORESOURCE_MEM,
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DPAA_PORTAL_CI);
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if (!addr_phys[1]) {
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dev_err(dev, "Can't get %s property 'reg::CI'\n",
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node->full_name);
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return -ENXIO;
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}
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channel = of_get_property(node, "cell-index", &len);
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if (!channel || (len != 4)) {
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dev_err(dev, "Can't get %s property 'cell-index'\n",
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node->full_name);
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return -ENXIO;
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}
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pcfg->channel = *channel;
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pcfg->cpu = -1;
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irq = platform_get_irq(pdev, 0);
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if (irq <= 0) {
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dev_err(dev, "Can't get %s IRQ\n", node->full_name);
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return -ENXIO;
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}
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pcfg->irq = irq;
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va = ioremap_prot(addr_phys[0]->start, resource_size(addr_phys[0]), 0);
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if (!va)
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goto err_ioremap1;
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pcfg->addr_virt[DPAA_PORTAL_CE] = va;
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va = ioremap_prot(addr_phys[1]->start, resource_size(addr_phys[1]),
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_PAGE_GUARDED | _PAGE_NO_CACHE);
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if (!va)
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goto err_ioremap2;
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pcfg->addr_virt[DPAA_PORTAL_CI] = va;
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pcfg->pools = qm_get_pools_sdqcr();
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spin_lock(&qman_lock);
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cpu = cpumask_next_zero(-1, &portal_cpus);
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if (cpu >= nr_cpu_ids) {
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/* unassigned portal, skip init */
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spin_unlock(&qman_lock);
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return 0;
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}
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cpumask_set_cpu(cpu, &portal_cpus);
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spin_unlock(&qman_lock);
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pcfg->cpu = cpu;
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if (!init_pcfg(pcfg))
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goto err_ioremap2;
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/* clear irq affinity if assigned cpu is offline */
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if (!cpu_online(cpu))
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qman_offline_cpu(cpu);
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return 0;
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err_ioremap2:
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iounmap(pcfg->addr_virt[DPAA_PORTAL_CE]);
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err_ioremap1:
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dev_err(dev, "ioremap failed\n");
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return -ENXIO;
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}
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static const struct of_device_id qman_portal_ids[] = {
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{
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.compatible = "fsl,qman-portal",
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},
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{}
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};
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MODULE_DEVICE_TABLE(of, qman_portal_ids);
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static struct platform_driver qman_portal_driver = {
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.driver = {
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.name = KBUILD_MODNAME,
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.of_match_table = qman_portal_ids,
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},
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.probe = qman_portal_probe,
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};
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static int __init qman_portal_driver_register(struct platform_driver *drv)
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{
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int ret;
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ret = platform_driver_register(drv);
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if (ret < 0)
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return ret;
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register_hotcpu_notifier(&qman_hotplug_cpu_notifier);
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return 0;
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}
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module_driver(qman_portal_driver,
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qman_portal_driver_register, platform_driver_unregister);
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