88 lines
2.7 KiB
C
88 lines
2.7 KiB
C
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/*
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* Copyright (C) 2007 by Analog Devices, Inc.
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*
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* The Inventra Controller Driver for Linux is free software; you
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* can redistribute it and/or modify it under the terms of the GNU
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* General Public License version 2 as published by the Free Software
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* Foundation.
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*/
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#ifndef __MUSB_BLACKFIN_H__
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#define __MUSB_BLACKFIN_H__
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/*
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* Blackfin specific definitions
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*/
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/* Anomalies notes:
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*
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* 05000450 - USB DMA Mode 1 Short Packet Data Corruption:
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* MUSB driver is designed to transfer buffer of N * maxpacket size
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* in DMA mode 1 and leave the rest of the data to the next
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* transfer in DMA mode 0, so we never transmit a short packet in
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* DMA mode 1.
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*
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* 05000463 - This anomaly doesn't affect this driver since it
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* never uses L1 or L2 memory as data destination.
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*
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* 05000464 - This anomaly doesn't affect this driver since it
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* never uses L1 or L2 memory as data source.
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*
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* 05000465 - The anomaly can be seen when SCLK is over 100 MHz, and there is
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* no way to workaround for bulk endpoints. Since the wMaxPackSize
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* of bulk is less than or equal to 512, while the fifo size of
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* endpoint 5, 6, 7 is 1024, the double buffer mode is enabled
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* automatically when these endpoints are used for bulk OUT.
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*
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* 05000466 - This anomaly doesn't affect this driver since it never mixes
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* concurrent DMA and core accesses to the TX endpoint FIFOs.
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*
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* 05000467 - The workaround for this anomaly will introduce another
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* anomaly - 05000465.
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*/
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/* The Mentor USB DMA engine on BF52x (silicon v0.0 and v0.1) seems to be
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* unstable in host mode. This may be caused by Anomaly 05000380. After
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* digging out the root cause, we will change this number accordingly.
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* So, need to either use silicon v0.2+ or disable DMA mode in MUSB.
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*/
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#if ANOMALY_05000380 && defined(CONFIG_BF52x) && \
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!defined(CONFIG_MUSB_PIO_ONLY)
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# error "Please use PIO mode in MUSB driver on bf52x chip v0.0 and v0.1"
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#endif
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#undef DUMP_FIFO_DATA
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#ifdef DUMP_FIFO_DATA
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static void dump_fifo_data(u8 *buf, u16 len)
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{
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u8 *tmp = buf;
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int i;
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for (i = 0; i < len; i++) {
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if (!(i % 16) && i)
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pr_debug("\n");
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pr_debug("%02x ", *tmp++);
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}
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pr_debug("\n");
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}
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#else
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#define dump_fifo_data(buf, len) do {} while (0)
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#endif
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#define USB_DMA_BASE USB_DMA_INTERRUPT
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#define USB_DMAx_CTRL 0x04
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#define USB_DMAx_ADDR_LOW 0x08
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#define USB_DMAx_ADDR_HIGH 0x0C
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#define USB_DMAx_COUNT_LOW 0x10
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#define USB_DMAx_COUNT_HIGH 0x14
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#define USB_DMA_REG(ep, reg) (USB_DMA_BASE + 0x20 * ep + reg)
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/* Almost 1 second */
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#define TIMER_DELAY (1 * HZ)
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static struct timer_list musb_conn_timer;
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#endif /* __MUSB_BLACKFIN_H__ */
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