187 lines
5.4 KiB
C
187 lines
5.4 KiB
C
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/*****************************************************************************
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*
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* Copyright (C) 1997-2002 Inside Out Networks, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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*
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* Feb-16-2001 DMI Added I2C structure definitions
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* May-29-2002 gkh Ported to Linux
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*
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*
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******************************************************************************/
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#ifndef _IO_TI_H_
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#define _IO_TI_H_
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/* Address Space */
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#define DTK_ADDR_SPACE_XDATA 0x03 /* Addr is placed in XDATA space */
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#define DTK_ADDR_SPACE_I2C_TYPE_II 0x82 /* Addr is placed in I2C area */
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#define DTK_ADDR_SPACE_I2C_TYPE_III 0x83 /* Addr is placed in I2C area */
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/* UART Defines */
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#define UMPMEM_BASE_UART1 0xFFA0 /* UMP UART1 base address */
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#define UMPMEM_BASE_UART2 0xFFB0 /* UMP UART2 base address */
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#define UMPMEM_OFFS_UART_LSR 0x05 /* UMP UART LSR register offset */
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/* Bits per character */
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#define UMP_UART_CHAR5BITS 0x00
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#define UMP_UART_CHAR6BITS 0x01
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#define UMP_UART_CHAR7BITS 0x02
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#define UMP_UART_CHAR8BITS 0x03
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/* Parity */
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#define UMP_UART_NOPARITY 0x00
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#define UMP_UART_ODDPARITY 0x01
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#define UMP_UART_EVENPARITY 0x02
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#define UMP_UART_MARKPARITY 0x03
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#define UMP_UART_SPACEPARITY 0x04
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/* Stop bits */
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#define UMP_UART_STOPBIT1 0x00
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#define UMP_UART_STOPBIT15 0x01
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#define UMP_UART_STOPBIT2 0x02
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/* Line status register masks */
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#define UMP_UART_LSR_OV_MASK 0x01
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#define UMP_UART_LSR_PE_MASK 0x02
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#define UMP_UART_LSR_FE_MASK 0x04
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#define UMP_UART_LSR_BR_MASK 0x08
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#define UMP_UART_LSR_ER_MASK 0x0F
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#define UMP_UART_LSR_RX_MASK 0x10
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#define UMP_UART_LSR_TX_MASK 0x20
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#define UMP_UART_LSR_DATA_MASK (LSR_PAR_ERR | LSR_FRM_ERR | LSR_BREAK)
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/* Port Settings Constants) */
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#define UMP_MASK_UART_FLAGS_RTS_FLOW 0x0001
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#define UMP_MASK_UART_FLAGS_RTS_DISABLE 0x0002
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#define UMP_MASK_UART_FLAGS_PARITY 0x0008
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#define UMP_MASK_UART_FLAGS_OUT_X_DSR_FLOW 0x0010
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#define UMP_MASK_UART_FLAGS_OUT_X_CTS_FLOW 0x0020
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#define UMP_MASK_UART_FLAGS_OUT_X 0x0040
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#define UMP_MASK_UART_FLAGS_OUT_XA 0x0080
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#define UMP_MASK_UART_FLAGS_IN_X 0x0100
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#define UMP_MASK_UART_FLAGS_DTR_FLOW 0x0800
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#define UMP_MASK_UART_FLAGS_DTR_DISABLE 0x1000
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#define UMP_MASK_UART_FLAGS_RECEIVE_MS_INT 0x2000
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#define UMP_MASK_UART_FLAGS_AUTO_START_ON_ERR 0x4000
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#define UMP_DMA_MODE_CONTINOUS 0x01
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#define UMP_PIPE_TRANS_TIMEOUT_ENA 0x80
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#define UMP_PIPE_TRANSFER_MODE_MASK 0x03
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#define UMP_PIPE_TRANS_TIMEOUT_MASK 0x7C
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/* Purge port Direction Mask Bits */
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#define UMP_PORT_DIR_OUT 0x01
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#define UMP_PORT_DIR_IN 0x02
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/* Address of Port 0 */
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#define UMPM_UART1_PORT 0x03
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/* Commands */
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#define UMPC_SET_CONFIG 0x05
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#define UMPC_OPEN_PORT 0x06
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#define UMPC_CLOSE_PORT 0x07
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#define UMPC_START_PORT 0x08
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#define UMPC_STOP_PORT 0x09
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#define UMPC_TEST_PORT 0x0A
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#define UMPC_PURGE_PORT 0x0B
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/* Force the Firmware to complete the current Read */
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#define UMPC_COMPLETE_READ 0x80
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/* Force UMP back into BOOT Mode */
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#define UMPC_HARDWARE_RESET 0x81
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/*
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* Copy current download image to type 0xf2 record in 16k I2C
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* firmware will change 0xff record to type 2 record when complete
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*/
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#define UMPC_COPY_DNLD_TO_I2C 0x82
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/*
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* Special function register commands
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* wIndex is register address
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* wValue is MSB/LSB mask/data
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*/
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#define UMPC_WRITE_SFR 0x83 /* Write SFR Register */
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/* wIndex is register address */
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#define UMPC_READ_SFR 0x84 /* Read SRF Register */
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/* Set or Clear DTR (wValue bit 0 Set/Clear) wIndex ModuleID (port) */
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#define UMPC_SET_CLR_DTR 0x85
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/* Set or Clear RTS (wValue bit 0 Set/Clear) wIndex ModuleID (port) */
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#define UMPC_SET_CLR_RTS 0x86
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/* Set or Clear LOOPBACK (wValue bit 0 Set/Clear) wIndex ModuleID (port) */
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#define UMPC_SET_CLR_LOOPBACK 0x87
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/* Set or Clear BREAK (wValue bit 0 Set/Clear) wIndex ModuleID (port) */
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#define UMPC_SET_CLR_BREAK 0x88
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/* Read MSR wIndex ModuleID (port) */
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#define UMPC_READ_MSR 0x89
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/* Toolkit commands */
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/* Read-write group */
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#define UMPC_MEMORY_READ 0x92
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#define UMPC_MEMORY_WRITE 0x93
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/*
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* UMP DMA Definitions
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*/
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#define UMPD_OEDB1_ADDRESS 0xFF08
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#define UMPD_OEDB2_ADDRESS 0xFF10
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struct out_endpoint_desc_block {
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__u8 Configuration;
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__u8 XBufAddr;
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__u8 XByteCount;
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__u8 Unused1;
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__u8 Unused2;
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__u8 YBufAddr;
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__u8 YByteCount;
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__u8 BufferSize;
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} __attribute__((packed));
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/*
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* TYPE DEFINITIONS
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* Structures for Firmware commands
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*/
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/* UART settings */
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struct ump_uart_config {
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__u16 wBaudRate; /* Baud rate */
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__u16 wFlags; /* Bitmap mask of flags */
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__u8 bDataBits; /* 5..8 - data bits per character */
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__u8 bParity; /* Parity settings */
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__u8 bStopBits; /* Stop bits settings */
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char cXon; /* XON character */
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char cXoff; /* XOFF character */
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__u8 bUartMode; /* Will be updated when a user */
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/* interface is defined */
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} __attribute__((packed));
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/*
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* TYPE DEFINITIONS
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* Structures for USB interrupts
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*/
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/* Interrupt packet structure */
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struct ump_interrupt {
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__u8 bICode; /* Interrupt code (interrupt num) */
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__u8 bIInfo; /* Interrupt information */
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} __attribute__((packed));
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#define TIUMP_GET_PORT_FROM_CODE(c) (((c) >> 6) & 0x01)
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#define TIUMP_GET_FUNC_FROM_CODE(c) ((c) & 0x0f)
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#define TIUMP_INTERRUPT_CODE_LSR 0x03
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#define TIUMP_INTERRUPT_CODE_MSR 0x04
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#endif
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