89 lines
2.7 KiB
C
89 lines
2.7 KiB
C
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/*
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* include/dt-bindings/display/tegra-dc.h
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*
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* Copyright (c) 2015-2016, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __TEGRA_DC_H
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#define __TEGRA_DC_H
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/* tegra_dc_out.type */
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#define TEGRA_DC_OUT_RGB 0
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#define TEGRA_DC_OUT_HDMI 1
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#define TEGRA_DC_OUT_DSI 2
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#define TEGRA_DC_OUT_DP 3
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#define TEGRA_DC_OUT_LVDS 4
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#define TEGRA_DC_OUT_NVSR_DP 5
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#define TEGRA_DC_OUT_FAKE_DP 6
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#define TEGRA_DC_OUT_FAKE_DSIA 7
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#define TEGRA_DC_OUT_FAKE_DSIB 8
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#define TEGRA_DC_OUT_FAKE_DSI_GANGED 9
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#define TEGRA_DC_OUT_NULL 10
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/* Keep as the last dc_out_define*/
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#define TEGRA_DC_OUT_MAX 11
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/* tegra_dc_out.dither */
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#define TEGRA_DC_UNDEFINED_DITHER 0
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#define TEGRA_DC_DISABLE_DITHER 1
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#define TEGRA_DC_ORDERED_DITHER 2
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#define TEGRA_DC_ERRDIFF_DITHER 3
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#define TEGRA_DC_TEMPORAL_DITHER 4
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/* bits for tegra_dc_out.flags */
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#define TEGRA_DC_OUT_HOTPLUG_HIGH (0 << 1)
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#define TEGRA_DC_OUT_HOTPLUG_LOW (1 << 1)
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#define TEGRA_DC_OUT_NVHDCP_POLICY_ALWAYS_ON (0 << 2)
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#define TEGRA_DC_OUT_NVHDCP_POLICY_ON_DEMAND (1 << 2)
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#define TEGRA_DC_OUT_CONTINUOUS_MODE (0 << 3)
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#define TEGRA_DC_OUT_ONE_SHOT_MODE (1 << 3)
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#define TEGRA_DC_OUT_N_SHOT_MODE (1 << 4)
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#define TEGRA_DC_OUT_ONE_SHOT_LP_MODE (1 << 5)
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#define TEGRA_DC_OUT_INITIALIZED_MODE (1 << 6)
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/* Makes hotplug GPIO a LP0 wakeup source */
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#define TEGRA_DC_OUT_HOTPLUG_WAKE_LP0 (1 << 7)
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/* bots for tegra_dc_out.hdcp_policy */
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#define TEGRA_DC_HDCP_POLICY_ALWAYS_ON 0
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#define TEGRA_DC_HDCP_POLICY_ON_DEMAND 1
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#define TEGRA_DC_HDCP_POLICY_ALWAYS_OFF 2
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/* tegra_dc_out.align */
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#define TEGRA_DC_ALIGN_MSB 0
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#define TEGRA_DC_ALIGN_LSB 1
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/* tegra_dc_out.order */
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#define TEGRA_DC_ORDER_RED_BLUE 0
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#define TEGRA_DC_ORDER_BLUE_RED 1
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/* tegra_fb_data.flags */
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#define TEGRA_FB_FLIP_ON_PROBE (1 << 0)
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/* tegra_dc_platform_data.flags */
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#define TEGRA_DC_FLAG_ENABLED (1 << 0)
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#define TEGRA_DC_FLAG_SET_EARLY_MODE (1 << 1)
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/* tegra_dc_out_pin.name */
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#define TEGRA_DC_OUT_PIN_DATA_ENABLE 0
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#define TEGRA_DC_OUT_PIN_H_SYNC 1
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#define TEGRA_DC_OUT_PIN_V_SYNC 2
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#define TEGRA_DC_OUT_PIN_PIXEL_CLOCK 3
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/* tegra_dc_out_pin.pol */
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#define TEGRA_DC_OUT_PIN_POL_LOW 0
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#define TEGRA_DC_OUT_PIN_POL_HIGH 1
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#endif /* __TEGRA_DC_H */
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